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**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91
***Info:...
***Versions:...
***Features:
o   Cost effective Windows Accelerator
o   Interfaces directly with X86 SX/DX/DX2 Systems
o   Interfaces directly with ISA486 CHIPSet
o   High performance achieved via direct access frame buffer Memory 
    Bus Architecture
o   Direct linear mapping of entire video memory anywhere in system 
    memory space
o   Flexible video memory configurations:  8, 16, or 32-bit wide 
    VRAM (256KB–2MB)
o   Supports the following display modes with 1MB of VRAM:
    • 8bpp up to 1024x768 (interlaced or non-I/L)
    • 16bpp up to 800x600 (with Sierra RAMDAC)
    • 24bpp up to 640x480 (with Bt484 or equiv)
o   Supports higher resolution display modes with 2MB VRAM:
    • 8bpp up to 1280x1024 (non-interlaced)
    • 16bpp up to 1024x768 (interlaced or non-I/L)
    • 24bpp up to 800x600 (non-interlaced)
o   Highly integrated design (non-multiplexed system bus, direct bus 
    drive, minimum external glue logic)
o   All video shifting performed on-chip to allow use of low-cost VGA 
    RAMDACs (allows video rates to 80 MHz)
o   Compatible with high-resolution color palette RAMDACs such as the 
    Bt484 and TI 34075 having separate 8-bit and 32-bit parallel 
    inputs for direct connection to VRAM serial data (allows video 
    rates to 135 MHz)
o   Full VGA compatibility
o   Interfaces directly with the 82C481 True-Color Graphics 
    Accelerator
o   Direct interface to 82C404 programmable clock 
o   In-Circuit Testability Features
o   Small low-cost package:  EIAJ-standard 160-pin plastic flat pack
o   Chip pinouts optimized for PCB layo


**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
**Other:...
**Disk:...
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*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C898         System/Power Management Controller (non-cache)c:Nov94
***Notes:...
***Info:
Overview
The 82C898 provides a highly integrated solution for fully compatible,
high performance PC/AT platforms. The 82C898 supports 486SX/DX/DX2/DX4
and  P24T  microprocessors  in  the  most  cost  effective  and  power
efficient designs  available today. For  high-end system applications,
this  device offers  optimum  performance for  systems  running up  to
50MHz.  

Based  fundamentally  on  OPTi’s   proven  82C801  and  82C802  design
architectures,  the 82C898 adds  additional memory  configurations and
extensive  power  management  control  for  the  processor  and  other
motherboard components.

The 82C898  supports the latest  in write-back processor  designs from
Intel, AMD, and Cyrix, as well as supporting the AT bus and VESA local
bus  for compatibility  and performance.  It also  includes  an 82C206
Integrated Peripherals Controller (IPC),  all in a single 208-pin PQFP
(Plastic Quad Flat Pack) for low cost.

Power Management
Figure  2-1   [see  datasheet]  exemplifies  the   flexibility  of  an
82C898/82C602-based designs GREEN strategy.  System designs can easily
accommodate both  SLe and non-SLe  CPUs.  If  an Intel non-SLe  CPU is
used, SMI#, SMIAOT#, and FLUSH# are no connects. One design can easily
accommodate  both  types  of   processors  with  minimal  changes  for
upgrades.

***Configurations:...
***Features:...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
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*ZyMOS...
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