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**82C235 Single Chip AT (SCAT) c89
***Notes:...
***Info:...
***Configurations:...
***Features:
o 80286 control logic and clocks that support CPU speeds of up to
12.5MHz with zero (or one) wait-states
o a 146818-compatible real time clock with 114 bytes of CMOS RAM
o Two 8237-compatible DMA controllers
o Two 8259-compatible interrupt controllers
o An 8254-compatible programmable interval timers
o An 8255-compatible programmable peripheral interface
o An 82284-compatible clock generation and READY interface
o An 82288-compatible bus controller
o A DRAM controller that supports up to 8MB to DRAM (up to 16MB
with the addition of an external '538-type decoder)
o A memory controller that provides shadow RAM and support for
either 8-bit or 16-bit BIOS ROM
o A DRAM refresh controller
o 32 EMS page registers (LIM EMS 4.0-compatible)
o Interface logic for an 80287 numeric coprocessor
o Interface logic for an 8042 keyboard controller
o Fast Gate A20 and Fast CPU Reset logic
o Power management features
o Compact packaging in a single 160-pin plastic flat pack (160PFP)
**82C836 Single Chip 386sx (SCATsx) <91...
**F8680/A PC/CHIP Single-Chip PC c93...
**
**Support Chips:
**64200 (Wingine) High Performance 'Windows Engine' c:Oct91...
**82C206 Integrated Peripheral Controller c86...
**82C601/A Single Chip Peripheral Controller <08/30/90...
**82C607 Multifunction Controller <Jun88...
**82C710 Universal Peripheral Controller c:Aug90...
**82C711 Universal Peripheral Controller II c:Jan91...
**82C712 Universal Peripheral Controller II c:Jan91...
**82C721 Universal Peripheral Controller III c:May93...
**82C735 I/O Peripheral Controller With Printgine c:Jul93...
**82C835 Single CHIP 386sx AT Cache Controller c:Apr91...
**F87000 Multi-Mode Peripheral Chip 11/23/93...
**Other:...
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*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:
Date source: 1995_Intel_Pentium_Processors_and_Related_Components.pdf
Information taken from:
1995_Intel_Pentium_Processors_and_Related_Components.pdf*
8249x Cache controllers.pdf**
>* Datasheet dated Nov'94
>** Datasheet undated, whole document dated '95
The info and features section have been solely sourced from the first
source. The second source provides far more detail. Additional
information in the configurations section has been sourced from the
second.
Difference to 82497/492 is this supports 1 Mbyte to 2 Mbyte cache.
***Info:...
***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX)
[82452NX] (RCG) [82451NX] (MIOC)
[82371EB] (PIIX4E),
CPUs: Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types: FPM EDO 2-way Interleave 4-way Interleave
Mem Rows: 8
DRAM Density: 16Mbit 64Mbit
Max Mem: 8GB
ECC/Parity: Both
AGP speed: N/A
Bus Speed: 100
PCI Clock/Bus: 1/3
**????? (Profusion) c:99...
**800 series...
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