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*Chips & Technologies...
**CS4000   WinCHIPS                 (64200/84021/84025)            c92
***Info:
The  WinCHIPS CHIPSet  is a  three chip  set that  includes  the 64200
Wingine windows Accelerator and the CS4021 PC CHIPSet (two chips).

The  WinCHIPS  solution is  specifically  designed  to enable  systems
companies to offer modular PCs that allow the end user to upgrade both
microprocessor and graphics  performance simultaneously. With WinCHIPS
CHIPSet based  systems, PC users  can easily migrate to  more powerful
microprocessors and add or  upgrade cache memory subsystems to achieve
maximum  computing performance.  Simultaneously,  the WinCHIPS  system
solution provides the ability of Wingine to scale graphics performance
in  proportion  to  increasing  microprocessor  speed.   

The two-chip systems logic elements of WinCHIPS support all 32-bit X86
microprocessors,  including i80386DX,  Am386,  Super38600, Super38605,
i80486SX, i80468DX, and i80486DX2  microprocessors running at up to 50
MHz clock frequencies.

The  WinCHIPS solution  memory  controller technology  is designed  to
offer  the greatest  performance  for both  cache-based and  non-cache
based designs. Moreover, the flexible WinCHIPS architecture allows end
users  to add  a  cache subsystem  when  upgrading to  microprocessors
running 25 MHz or faster.

For non-cache 486SX designs, the WinCHIPS' patented page mode and page
interleaved memory controller supports DRAM Burst transfer for systems
running  up to  25 MHz.  For cache-based  Super38605, and  486DX class
systems, WinCHIPS  supports 64K to  512K of direct mapped,  write back
cache  memory.  the WinCHIPS  cache  architecture  integrates a  write
buffer and zero wait state cache writes for maximum performance.

The WinCHIPS solution is unique in the industry in providing automatic
system wide performance benefits as  end users upgrade to faster, more
powerful microprocessors.  This is accomplished with the 64200 Wingine
Memory Bus Architecture which can support up to two banks of dual port
VRAM  video memory  on  the microprocessor  memory  bus.  Because  the
required video  memory control logic  is integrated into  the WinCHIPS
4021 Bus/DRAM  Controller, video  memory can  be mapped  directly into
main memory where it is linearly addressed by the microprocessor.

By allowing  the processor to  access video memory  directly, graphics
functions performed by  the processor, such as BIT  BLTing, scale with
overall  processor power.  Hence  the bottleneck  inherent in  today's
local abus and ISA bus graphics subsystems is removed.  With the 64200
Wingine, the  performance of  the display scales  correspondingly with
microprocessor power.

WinCHIPS is the  industry's first CHIPSet to offer  an advanced set of
hardware  features  designed to  specifically  support the  SuperState
System  Management   Architecture  found  on   the  Super38605  micro-
processors.

***Configurations:...
***Features:...
**CS4021   ISA/486                  (84021/84025)                  c92...
**CS4031   CHIPSet                  (84031/84035)              5/10/93...
**CS4041/5 CHIPSet                  (84041/84045)              2/10/95...
**CB8291   ELEAT                    [no datasheet]                 c90...
**CB8295   ELEATsx                  [no datasheet]                 c90...
**82C100   IBM PS/2 Model 30/Super XT                                ?...
**82C110   IBM PS/2 Model 30/Super XT                                ?...
**82C235   Single Chip AT (SCAT)                                   c89...
**82C836   Single Chip 386sx (SCATsx)                              <91...
**F8680/A  PC/CHIP Single-Chip PC                                  c93...
**
**Support Chips:
**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91...
**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
**Other:...
**Disk:...
**Video:...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**Athlon etc
***Notes (Unverified Information!):...
***730S/SE     c:Dec00
Chips:         
[730S] or [730SE]                                
CPUs:          Athlon Duron,                                  
DRAM Types:    SDRAM PC133 Asynch                           
Max Mem:       1.5GB,                     
ECC/Parity:    No,           
AGP speed:     Integrated SiS301 With External 1x 2x 4x AGP*
Bus Speed:     100 x2                                
PCI Clock/Bus: PCI 2.2

>*73SE, no external AGP slot

***733         c:Apr01...
***735/735S    c:Apr01...
***740         c:Nov01...
***745         c:Feb02...
***746/DX/FX   c:Aug02...
***748         c:Aug03...
***741/741GX   ?...
***M741        ? (mobile)...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
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