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**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



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**82C556/7/8N    Viper-N  Viper Notebook Chipset             <05/25/95
***Notes:...
***Info:...
***Configurations:...
***Features:
CPU Interface
o   Fully supports Intel’s 3.3V Pentium Processor and dual processor 
    configuration at 50, 60, and 66.667MHz
o   Supports P54C, P55C, K5, and M1 processors
o   Supports the Cyrix M1 Processor linear burst mode
o   Three chip solution:
    - 82C556 DBC (Data Buffer Controller) in a 160-pin PQFP (Plastic 
      Quad Flat Pack) or 176-pin TQFP (Thin Quad Flat Pack)
    - 82C557 SYSC (System Controller) in a 208-pin PQFP or TQFP
    - 82C558N IPC (Integrated Peripherals Controller) in a 208-pin 
      PQFP or TQFP
o   Supports CPU address pipelining

Cache Interface
o   Write-back/write-through, direct-mapped cache with size 
    selections: 64KB, 128KB, 256KB, 1MB and 2MB
o   Support for synchronous and asynchronous SRAMs, pipelined sync- 
    hronous SRAMs, and Intel standard BSRAMs (BiCMOS SRAMs)
o   Support for the Sony SONIC-ZWPT Cache Module
o   Programmable cache write policy:
    - Write-back
    - Write-through
    - Adaptive write-back
o   Built-in tag auto-invalidation circuitry
o   Fully programmable 3-2-2-2 asynchronous cache burst read/Write 
    cycles, 3-1-1-1/2-1-1-1 burst read/write support at 66/50MHz
o   Options for cacheable, write protected. system and video BIOS

DRAM Interface
o   Supports six banks of 64-bit wide DRAMs with 256KB, 512KB. 1MB, 
    2MB, 4MB, 8MB and 16MB addressing page mode DRAMs
o   Supports DRAM configurations up to 512MB
o   Supports 3-3-3-3 pipelined DRAM burst cycles
o   64-bit DRAM post write buffer
o   Programmable drive currents for the DRAM control signals
o   Hidden refresh with CAS-before-RAS refresh supported
o   Support for two programmable non-cacheable memory regions

PCI Interface
o   Interfaces the CPU and standard buses to both Peripheral Component 
    Interconnect (PCI) and VL bus operating in synchronous/async- 
    hronous modes, with VL bus always running at PCI bus operating 
    frequency
o   Supports three PCI masters, one VL slave, and six ISA peripherals
o   Supports PCI pre-snoop for PCI masters
o   PCI byte/word merge support for CPU accesses to PCI bus,‘ and 
    support for PCI pre-fetch
o   Burst mode PCI accesses to local memory supported

Miscellaneous
o   Integrated two drive VL-based IDE controller
o   Self-refresh supported during Suspend mode
o   Support for flash ROM
o   Shadow RAM option
o   Transparent 8042 emulation for fast CPU reset and Gate A20 
    generation
o   Supports Port 092h, fast Gate A20 and fast reset
o   Includes a fully integrated 82C206 with external real-time clock 
    (RTC) interface

**82C556M/7M/8E  Viper-N+ Viper Notebook Chipset                  c:96...
**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?...
**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
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***I/O:
***W83758/F  I/O COUPLER                                           <94...
***W83768    I/O COUPLER                                       c:oct94...
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