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**M1521/23       Aladdin III       50-66MHz                     <Nov96
***Info:...
***Configurations:...
***Features:...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
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**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**W83769          Local Bus IDE Solution                           <94
***Info:
GENERAL DESCRIPTION

The W83769  is a  high-performance, low-cost, highly  integrated logic
design  for IDE hard  disk applications  in PCI  (Peripheral Component
Interconnect)  local  bus systems.  It  provides  a  bridge between  a
standard  IDE  drive  and the  PCI  local  bus.  The W83769  is  fully
compatible  with the  ANSI ATA  3.0 specifications  for IDE  hard disk
operation  and the  PCI SIG  revision 2.0  specifications for  the PCI
local bus  protocol. Packaged in  a 100-pin PQFP, the  W83769 directly
supports the 32-bit PCI bus without requiring any external TTLs.

The W83769  operates at up to 50  MHz and provides a  full 32-bit data
path to the PCI bus. Doubleword read and write operations are provided
via  internal   control  and  conversion  logic.   Write  posting  and
read-ahead  allows CPU  memory  cycles to  run  concurrently with  IDE
cycles and improves the hard disk buffer-to-host transfer rate.

The IDE  drive interface timing  of the W83769 is  completely software
programmable,  including command  active/recovery  timing and  address
setup-hold   timing  for   each  drive.   The  device   supports  Fast
ATA/Enhanced  IDE  mode  3  timing  and IORDY  monitoring  for  better
performance.   The  W83769  directly  supports four  IDE  drives  with
170/1F0   dual   IDE  connectors.   The  IO base   addresses  of   the
primary/secondary  IDE connector  are exchangeable  by  power-on strap
option.

***Versions:...
***Features:
o  100% PCI Local Bus 2.0 compatible
o  IDE primary/secondary address selection
o  32-bit local bus interface
o  Automatic standby mode for power saving
o  On-chip decode and select logic
o  Supports local bus operation at up to 50 MHz
o  Four-level pipelined read-ahead and four-level posted write buffers 
   for concurrent system operations
o  Programmable parameters for command active and recovery timing
o  Direct supports four IDE disk drives
o  Programmable address setup timing and data active/recovery timing
   for each drive
o  Slew-rate-controlled direct driving capability to interface with 
   IDE disk
o  Drivers for DOS, Windows, Novell, and OS/2
o  Supports ATA 3.0 IDE standard
o  Packaged in 100-pin PQFP

**
**UARTS:
**W86C250A  UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
**Other:...
*ZyMOS...
*General Sources:...