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*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C496/497 486-VIP 486 Green PC VESA/ISA/PCI Chipset <95
***Info:...
***Configurations:...
***Features:
o Host Bus
- Supports Intel 486, P24D, P24T, DX4, SL
- Enhanced 486, AMD 486, Enhanced Am486, and Cyrix M7/Cx 5x86
in 25/33/40/50 Mhz, 5V CPU.
o VESA Bus Slave
- Supports VESA Bus Specification Rev. 2.0p with Local Device
Target only.
o PCI Local Bus
- Supports PCI Bus Specification Rev. 2.0 with up to 4 PCI Masters
- Implements 3 Level Post Write Buffer for CPU write PCI Target
Memory Cycle.
- Supports Back to Back Single Memory Write to PCI Burst Write.
- Supports PCI Interrupt Steering with Four PIRQ Inputs.
- Supports PCI Master Burst Accesses On-Board Memory Up to 64
Double Word Long.
- Supports Concurrency PCI Bus.
- Snoop Filter and Advanced Snooping for Reducing CPU Snoops
During Sequential PCI Master Accesses On-Board Memory Cycles.
- Supports PCI Bus PCI to PCI Bridge.
o Supports L1 Cache Write Back CPU (P24T/P24D/M7/Enhanced Am486)
systems
o Supports Cx 5x86 Linear Burst Order Mode.
o L2 Cache Controller
- Write-Back or Write-Through Schemes
- Bank Interleave/Non-Interleave Cache Access
- Cache Size: 64K/128K/256K/512K/1MB
- 8 bit or 7 bit Tag (Combined Tag and Dirty SRAM) with
Direct-Mapped cache organization.
- Optional Separate Dirty SRAM.
o DRAM Controller
- Supports 8 Banks Non-Interleaved Access for Single and Double
Sided SIMMs up to 255 MBytes.
- Supports DRAM CAS Before RAS Refresh.
- Supports "Table-Free" DRAM configuration.
- Programmable driving current for the DRAM signals.
- Supports Symmetrical and Asymmetrical DRAMs.
- Supports 256K/512K/1M/2M/4M/8M/16M/32M xN Fast Page Mode and
EDO DRAM.
o Built-In Local Bus IDE Interface
- Supports Data Conversion for the Double Word Accessing
- Supports Symmetry Configuration for Channel 1 and Channel
0, PIO Mode IDE Hard Disks.
- Supports Mode 3 and above Timing.
- Supports Individual Drive Timing Setting for Optimal Performance
- Supports Posted Write Buffers and Pre-fetch Buffer.
- Supports Primary IDE or Secondary IDE Addressing (1Fx/17x)
o Fast-Slow Link Interface
- Linkage to ISA Bridge by FS-Link Interface.
- Fast Access to BIOS, ISA Memory Holes, and Interrupt Acknowledge
Cycle by FS-Link.
- Two Programmable Non-Cacheable Regions
- Two Programmable PCI Memory Holes and One Programmable ISA
Memory Holes.
o 208-Pin PQFP
o 0.6um Low Power CMOS Technology
**85C501/502/503 Pentium/P54C PCI/ISA Chipset <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5120 Pentium PCI/ISA Chipset (Mobile) <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5511/5512/5513 Pentium PCI/ISA <06/14/95...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96...
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83977TF WINBOND I/O (Multi I/O) c97
***Info:...
***Versions:...
***Features:
General
o Plug & Play 1.0A compatible
o Support 13 IRQs, 4 DMA channels, full 16-bit address decoding
o Capable of ISA Bus IRQ Sharing
o Compliant with Microsoft PC97 Hardware Design Guide
o Support DPM (Device Power Management), ACPI
o Report ACPI status interrupt by SCI signal issued from any of the
13 IQRs pins or GPIO xx
o Programmable configuration settings
o Single 24/48 Mhz clock input
FDC
o Compatible with IBM PC AT disk drive systems
o Variable write pre-compensation with track selectable capability
o Support vertical recording format
o DMA enable logic
o 16-byte data FIFOs
o Support floppy disk drives and tape drives
o Detects all overrun and underrun conditions
o Built-in address mark detection circuit to simplify the read
electronics
o FDD anti-virus functions with software write protect and FDD
write enable signal (write data signal was forced to be inactive)
o Support up to four 3.5-inch or 5.25-inch floppy disk drives
o Completely compatible with industry standard 82077
o 360K/720K/1.2M/1.44M/2.88M format; 250K, 300K, 500K, 1M, 2M bps
data transfer rate
o Support 3-mode FDD, and its Win95 driver
UART
o Two high-speed 16550 compatible UARTs with 16-byte send/receive
FIFOs
o MIDI compatible
o Fully programmable serial-interface characteristics:
- 5, 6, 7 or 8-bit characters
- Even, odd or no parity bit generation/detection
- 1, 1.5 or 2 stop bits generation
o Internal diagnostic capabilities:
- Loop-back controls for communications link fault isolation
- Break, parity, overrun, framing error simulation
o Programmable baud generator allows division of 1.8461 Mhz and 24
Mhz by 1 to (2^16-1)
o Maximum baud rate up to 921k bps for 14.769 Mhz and 1.5M bps
for 24 Mhz
Infrared
o Support IrDA version 1.0 SIR protocol with maximum baud rate up to
115.2K bps
o Support SHARP ASK-IR protocol with maximum baud rate up to 57,600
bps
o Support S/W driver for Windows95 and Windows98 (Memphis)
Parallel Port
o Compatible with IBM parallel port
o Support PS/2 compatible bi-directional parallel port
o Support Enhanced Parallel Port (EPP) - Compatible with IEEE 1284
specification
o Support Extended Capabilities Port (ECP) - Compatible with IEEE
1284 specification
o Extension FDD mode supports disk drive B; and Extension 2FDD mode
supports disk drives A and B through parallel port
o Enhanced printer port back-drive current protection
Keyboard Controller
o 8042 based with optional F/W from AMIKKEY-2, Phoenix MultiKey/42
or customer code with 2K bytes of programmable ROM, and 256 bytes
of RAM
o Asynchronous Access to Two Data Registers and One status Register
o Software compatibility with the 8042 and PC87911 microcontrollers
o Support PS/2 mouse
o Support port 92
o Support both interrupt and polling modes
o Fast Gate A20 and Hardware Keyboard Reset
o 8 Bit Timer/ Counter
o Support binary and BCD arithmetic
o 6MHz, 8 MHz, 12 MHz, or 16 MHz operating frequency
General Purpose I/O Ports
o 23 programmable general purpose I/O ports; 1 dedicate, 22 optional
o General purpose I/O ports can serve as simple I/O ports, interrupt
steering inputs, watching dog timer output, power LED output,
infrared I/O pins, general purpose address decoder, KBC control
I/O pins
OnNow Funtions
o Keyboard wake-up by programmable keys (patent pending)
o Mouse wake-up by programmable buttons (patent pending)
Package
o 128-pin PQFP
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
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