[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**800 series
***810 (Whitney) 04/26/99...
***810L (Whitney) 04/26/99...
***810-DC100 (Whitney) 04/26/99...
***810e (Whitney) 09/27/99...
***810e2 (Whitney) 01/03/01...
***815 (Solano) 06/19/00...
***815e (Solano-2) 06/19/00...
***815em (Solano-?) 10/23/00...
***815ep (Solano-3) c:Nov'00...
***815p (Solano-3) c:Mar'01...
***815g (Solano-3) c:Sep'01...
***815eg (Solano-3) c:Sep'01...
***820 (Camino) 11/15/99...
***820e (Camino-2) 06/05/00...
***830M (Almador) 07/30/01...
***830MP (Almador) 07/30/01...
***830MG (Almador) 07/30/01...
***840 (Carmel) 10/25/99...
***845 (Brookdale) 09/10/01...
***845MP (Brookdale-M) 03/04/02...
***845MZ (Brookdale-M) 03/04/02...
***845E (Brookdale-E) 05/20/02...
***845G (Brookdale-G) 05/20/02...
***845GL (Brookdale-GL) 05/20/02...
***845GE (Brookdale-GE) 10/07/02...
***845PE (Brookdale-PE) 10/07/02...
***845GV (Brookdale-GV) 10/07/02...
***848P (Breeds Hill) c:Aug'03...
***850 (Tehama) 11/20/00...
***850E (Tehama-E) 05/06/02...
***852GM (Montara-GM) 01/14/03...
***852GMV (Montara-GM) ???...
***852PM (Montara-GM) 06/11/03...
***852GME (Montara-GM) 06/11/03...
***854 (?) 04/11/05...
***855GM (Montara-GM) 03/12/03...
***855GME (Montara-GM) 03/12/03...
***855PM (Odem) 03/12/03...
***860 (Colusa) 05/21/01...
***865G (Springdale) 05/21/03...
***865PE (Springdale-PE) 05/21/03...
***865P (Springdale-P) 05/21/03...
***865GV (Springdale-GV) c:Sep'03...
***875P (Canterwood) 04/14/03...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C700 FireStar c:97
***Info:...
***Configurations:...
***Features:
PCI Bus
o PCI supports sustained X-1-1-1 bursts, even to DRAM through an
innovative mechanism. PCI operation can be concurrent with
CPU/L2 cache and IDE operations.
o PCI clock generation eliminates the need for external PCI clock
buffers in many designs and allows the PCI bus to be effectively
power-managed.
o 3.3V or 5.0V PCI is supported on the FireStar PCI bus. If FireStar
is configured for 3.3V operation, 5.0V-only PCI plug-in cards and
docking stations can still be supported through a bridge device
such as OPTi's 820824 Cardbus Controller/Docking Solution, whose
prefetch and post-write buffers off-load operations from the
primary PCI bus.
DRAM Controller
o Provides BIOS with the means to automatically detect the DRAM type
in use on each bank, whether fast page mode, EDO, or synchronous
DRAM, allowing BIOS routines to efficiently program DRAM
operation.
ISA Bus
o A full ISA bus is directly provided to support the keyboard
controller, BIOS ROM, and Compact ISA peripheral devices for local
ISA support with no TTL. When reduced ISA operation is selected,
other FireStar pins become available for general purpose use.
Bus Mastering IDE
o FireStar supports two bus mastering IDE channels that function
concurrently with operations on the CPU/L2 cache interface and PCI
interface. Up to four drives are supported.
o An emulated bus mastering IDE feature allows IDE drives that are
not commonly available as bus mastering devices, such as CD-ROM
drives, to act as bus mastering drives. For example, a CD-ROM
drive can transfer video data to DRAM while the CPU is
decompressing the data and sending it to the graphics controller.
Thermal Management
o Fail-safe thermal management incorporates feedback logic that
requires a very inexpensive external sensor circuit.
o Hardware monitors temperature directly and reliably, while the
fail-safe aspect of the circuitry ensures that sensor component
failure will automatically inhibit CPU clocking to prevent
overheating.
o SMM code will be able to read (and display if desired) actual CPU
temperature.
ACPI Implementation
o Microsoft Advanced Configuration and Power Interface (ACPI) is
being implemented in the FireStar silicon. ACPI is a standard
register interface for power management function jointly developed
by Microsoft, Intel, and Toshiba.
Miscellaneous
o The standard version of the chip can run at 3.3V, up to 66MHz on
the CPU bus.
o A new Context Save Mode feature allows chip registers to be saved
and restored more efficiently than ever before, requiring less SMM
code and storage space.
o The OPTi Viper-N+ Power Management Unit is used, maintaining
backward compatibility down to the register level with previously
written support firmware.
o Serial IRQs are supported as an option for interrupts on PCI.
o Known devices in the system can be positively decoded on the PCI
bus, eliminating the delay for subtractive decode and improving
the efficiency of ISA operations.
o ISA bus cycle speed can be individually controlled to certain ISA
device groups.
o Simple logic gate functions can be assigned to unused pins to
eliminate the need for external TTL. Pin programming is far more
flexible than ever possible on any other chip.
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83777F/87F Power I/O (Multi I/O) <95
***Info:...
***Versions:...
***Features:
o Compatible with IBM PC AT disk drive systems
o Variable write pre-compensation with track selectable capability
o DMA enable logic
o Non-burst mode DMA option
o Supports floppy disk drives and tape drives
o Detects all overrun and underrun conditions
o Data rate and drive control registers
o Built-in address mark detection circuit to simplify the read
electronics
o IBM PC system address decoder
o Supports up to two embedded hard disk drives (IDE AT BUS)
o Single 24 MHz crystal input
o Two high-speed 16550 compatible UARTs with 16-byte send/receive
FlFOs
o MIDI compatible
o Fully programmable serial-interface characteristics:
- 5, 6, 7 or 8-bit characters
- Even, odd or no parity bit generation/detection
- 1, 1.5 or 2 stop bits generation
o Internal diagnostic capabilities:
- Loop-back controls for communications link fault isolation
- Break, parity, overrun, framing error simulation
o Programmable baud generator allows division of 1.8461 MHz by 1 to
(2^16 - 1)
o Compatible with IBM parallel port
o Supports parallel port with bi-directional lines
o Supports Enhanced Parallel Port (EPP)
- Compatible with IEEE 1284 specification
o Supports Extended Capabilities Port (ECP)
- Compatible with IEEE 1284 specification
o Extension FDD mode supports disk drive B through parallel port
o Extension Adapter Mode supports pocket devices through parallel
port
o Extension 2FDD mode supports disk drives A and B through parallel
port
o JOYSTICK mode supports joystick through parallel port
o Programmable configuration settings
o Immediate or automatic power-down mode for power management
o All hardware power-on settings have internal pull-up or pull-down
resistors as default value
o FDD anti-virus functions with software write protect and FDD
write enable signal, write data signal force inactive
o Packaged in 100-pin QFP
W83777F:
o Supports up to four 3.5-inch or 5.25-inch floppy disk drives
o Completely compatible with industry standard 82077
o 360K/720K/1.2M/1.44M/2.88M format
o 250K, 300K, 500K, 1M bps data transfer rate
o Supports vertical recording format
o 16-byte data FIFOs
o Pins and functions downward compatible with W83757F, W83757AF,
W83767F, and W83787F
W83787F:
o Supports up to four 3.5-inch or 5.25-inch floppy disk drives
o Completely compatible with industry standard 765
o 360K/720K/1.2M/1.44M format
o 250K, 300K, 500K bps data transfer rate
o Pins and functions downward compatible with W83757F, W83757AF,
and W83767F
**W83877F WINBOND I/O (Multi I/O) <96...
**W83877TF/TG/TD WINBOND I/O (Multi I/O) c97...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved