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**82489DX       Advanced Programmable Interrupt Controller    10/12/92
***Notes:...
***Info:
1.0 INTRODUCTION

The  82489DX  Advanced   Programmable  Interrupt  Controller  provides
multiprocessor interrupt management, providing both static and dynamic
symmetrical interrupt distribution across all processors.

The main  function of the  82489DX is to provide  interrupt management
across all  processors. This  dynamic interrupt  distribution includes
routing of the interrupt to the lowest-priority processor. The 82489DX
works in  systems with multiple  I/O subsystems, where  each subsystem
can  have  its  own  set  of  interrupts.   This  chip  also  provides
inter-processor interrupts,  allowing any  processor to  interrupt any
processor or set  of processor. Each 82489DX I/O  init interrupt input
pin is individually  programmable by software as either  edge or level
triggered.  The interrupt vector and interrupt steering information an
be specified  per pin.  A  32-bit wide timer  is provided that  can be
programmed to interrupt the local processor.  the timer can be used as
a counter to provide a time base to software running on the processor,
or to generate  time slice interrupts locally to  that processor.  the
82489DX   provides   32-bit   software    access   to   its   internal
registers. Since no  82489DX register read have any  side effects, the
82489DX registers  can be aliased  to a  user read-only page  for fast
user access (e.g., performance monitoring timers).

The 82489DX  supports a generalized naming/addressing  scheme that can
be tailored by  software to fit a variety of  system architectures and
usage  models.   It  also  supports 8259A  compatibility  by  becoming
virtually  transparent with  regard to  an externally  connected 8259A
style controller, making the 8259A visible to software.

***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
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*UMC...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94
***Notes:...
***Configurations:...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83757          SUPER I/O  CHIP                                  <92
***Info:
GENERAL  DESCRIPTION 

The W83757 is a super multi  I/O chip that combines the functions of a
Floppy Disk Drive adapter, serial (UART)/parallel adapter, IDE bus and
game  port.   The W83757's  disk  drive  adapter  functions include  a
standard   Floppy  Disk  Drive   controller,  data   separator,  write
precompensation  circuit,  decode logic,  data  rate selection,  clock
generator,  drive interface  control logic,  interrupt and  DMA logic,
thus greatly  reducing the number of components  required to interface
floppy disk  drives. As a UART,  the chip supports  serial to parallel
conversion on data  characters received from a peripheral  device or a
MODEM, and  parallel to serial conversion on  data characters received
from the CPU. The CPU can read  the complete status of the UART at any
time  during operation.  The UART  includes a  programmable  baud rate
generator, complete MODEM control capability and a processor-interrupt
system.  As a parallel port, the W83757 provides the user with a fully
bidirectional parallel centronics-type  printer interface. Besides the
above functions, this chip also supports two Embedded Hard Disk Drives
(AT bus interface) and a game port decoder.
***Versions:...
***Features:...
**W83767F         ??           Multi I/O  [no datasheet]
**W83777F/87F     Power I/O   (Multi I/O)                          <95...
**W83877F         WINBOND I/O (Multi I/O)                          <96...
**W83877TF/TG/TD  WINBOND I/O (Multi I/O)                          c97...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O)                          c97...
**W83977TF        WINBOND I/O (Multi I/O)                          c97...
**W83977EF        WINBOND I/O (Multi I/O)                          <98...
**W83977ATF       WINBOND I/O (Multi I/O)                          <98...
**
**Disk Controller:
**W83759/A/F/AF   Advanced VL-IDE Disk Controller                  <96...
**W83769          Local Bus IDE Solution                           <94...
**
**UARTS:
**W86C250A  UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter         <Jul89...
**W86C451   I/O controller for IBM PC/AT/XT                     <Jul89...
**W86C452   I/O controller for IBM PC/AT                         Jul89...
**W86C456   I/O controller [no datasheet]                            ?
**W860551/P UART with FIFO and Printer Port Controller             <94...
**
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