[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**440 series:
***440FX (Natoma) 05/06/96...
***440LX (Balboa) 08/27/97...
***440BX (Seattle) c:Apr'98...
***440DX (?) c:?...
***440EX (?) c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?) 05/17/99...
***440MX (Banister) 05/17/99...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
**SL82C550 'Rossini' Pentium [no datasheet] c:95
***Notes:
from:
http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html
The Symphony "Rossini" Chipset (Symphony Labs: 10AD/4269) (9/13/95)
This is apparently a low-cost alternative to the Triton chipset, as it
operates with up to 66 MHz external clock rates, up to two CPUs,
pipelined or non-pipelined, synchronous or [conventional] asynchronous
SRAM cache, EDO RAM, and does dual-port busmastering IDE. It will,
apparently, adjust the voltages to its various (CPU, PCI, cache, RAM)
buses to suit their requirements, and will control up to six PCI
masters. It consists of the SL82C551 cache/memory controller, the
SL82C522 data path controller, and the SL82C555 system I/O controller.
***Configurations:...
**
**Support Chips:
**SL82C365 Cache Controller (for 386DX/SX) c:91...
**SL82C465 Cache Controller (for 486/386DX/SX) c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83C553F System I/O Controller With PCI Arbiter c:sep95
***Info:...
***Versions:...
***Features:
High Integration PCI-ISA solution
o Optimized for lowest system cost
o Complies with PCI Revision 2.0 specification
o Universal PCI device supporting x86 and PowerPC (non-x86) modes of
operation
Nand tree on most signal pins to facilitate board level testing in PCB
manufacturing environment
Integrated PCI Bus Master IDE controller
o Dual channel Bus Master IDE for up to 4 peripherals, including hard
drives, ATAPI (IDE) CD-ROMs, tapes, etc.
o Multi-threading capability allows two simultaneous I/O processes
o Independent IDE Timing registers allow fast/slow devices on the
same cable
o Two independent DMA channels for Bus Master scatter/gather DMA
transfers across the PCI bus
o Large 64 byte DMA FIFO for zero wait state PCI burst transfers
o Support for multiword DMA Mode 1 (13.3 MB/s), Mode 2 (16.6 MB/s)
IDE drives
o PIO IDE support for Modes 0-4 disks
o Edge rate controlled outputs directly drive IDE headers
o Four byte pre-fetch and posted write buffers
o DMA channels can be re-configured for P-n-P motherboard devices
o Software and register set compatible with Intel Bus Master PCI-IDE
specification (SFF 8038i)
o Supported by existing device drivers for MS-DOS, Windows, NT 3.1,
NT 3.5x, NT4.0, OS/2 2.1, OS/2 Warp, NetWare 3.12 and 4.x**
o Recompiled PowerPC device drivers also available
>** OS/2, Novell driver by DTC
PCI Arbiter
o Supports CPU, IDE, ISA and five additional bus masters
o Programmable access windows allow fine tuning of PCI access for
each bus master
o Can be disabled on power-up via strapped pin
Power Management Break Event support for Green PC applications
Built-in Integrated Peripheral Controller (IPC) with standard PC-AT
peripherals
o Two 82C37A DMA controllers (types A, B, and F)
- 32-bit addressing allows use of alternate CPUs, such as PowerPC
- supports multiple 8-bit and 16-bit scatter/gather DMA channels
o Two 82C59A interrupt controllers
- all IRQ inputs may be programmed for edge or level sensitivity
o One 82C54 counter/timer
o Routes external PCI interrupts to a software-selectable interrupt
channel
PCI Bus Interface
o PCI Revision 2.1 compliant
o PCI clock frequencies up to 33 MHz at 5V
o Supports delayed completion for ISA cycles
o Active address decoding for internal I/O devices
o Subtractive decoding for ISA bridge, KBC and RTC
o Supports disconnection (with retry) for slow internal accesses to
improve latency
o Short PCI bus ownership when mastering to minimize overall system
latency
o Fast DMA transfers from I/O devices to PCI agents as a master
o Separate request and grant signals for ISA DMA and IDE controllers
ISA Bus Bridge
o Full implementation of a standard ISA bus
o Separate ISA and IDE data buses reduce noise and increase system
performance
o Synchronous PCI-to-ISA interface with direct drive for 5 ISA slots
XD-Bus interface
o Support for BIOS ROM or PowerPC systems boot ROM
o Support for flash EPROM
o Provides keyboard controller connections
o Provides real-time clock connections
o Provides data buffer control
Miscellaneous
o Port B support
o Port 92 support
Uses 0.6um, ultra-low power CMOS technology for Rev. E and below;
0.5um for Rev. G. Packaged in a 208-pin PQFP package
**W83628F/29D PCI TO ISA Bridge Set c98...
**W83626F/D LPC TO ISA Bridge Set <00...
**
**Multi I/O:
**W83757 SUPER I/O CHIP <92...
**W83767F ?? Multi I/O [no datasheet]
**W83777F/87F Power I/O (Multi I/O) <95...
**W83877F WINBOND I/O (Multi I/O) <96...
**W83877TF/TG/TD WINBOND I/O (Multi I/O) c97...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved