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**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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*SIS...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98
***Info:
The SiS5591/5592 SiS5595 glueless P5 A.G.P. chipset provides a high
performance/cost index Desktop/Mobile solution for the Intel Pentium
P54C/P55C, AMD K5/K6, and Cyrix M1/M2 A.G.P. system.
The SiS5591/SiS5592 A.G.P./PCI controller integrated the Host-to-PCI
bridge, the L2 cache controller, the DRAM controller, the Accelerated
Graphics Port interface, and the PCI IDE controller. The L2 cache
controller can support up to 1 M P.B. SRAM, and the DRAM controller
can support EDO/FP/SDRAM memory up to 768 MB with optional ECC or
parity check function. The A.G.P. 1.0 compliance interface supports
both 1X, and 2X speed mode with sideband address capability. The
built-in fast PCI IDE controller supports the ATA PIO/DMA, and the
Ultra DMA/33 functionality.
SiS5591 and SiS5592 have some pin-out switching to facilitate the
main-board layout. SiS5591 pin assignment is based on the ATX form
factor, and SiS5592 pin assignment is based on the NLX form
factor. Beside the pin-out switching, SiS5591 and SiS5592 is totally
the same on the internal logic circuit.
The SiS5595 PCI system I/O integrates the PCI-to-ISA bridge with the
DDMA, and Serial IRQ capability, the ACPI/Legacy PMU, the Data
Acquisition Interface, the Universal Serial Bus host/hub interface,
and the ISA bus interface which contains the ISA bus controller, the
DMA controllers, the interrupt controllers, and the Timers. It also
integrates the Keyboard controller, and the Real Time Clock (RTC). The
built-in USB controller, which is fully compliant to OHCI (Open Host
Controller Interface), provides two USB ports capable of running
full/low speed USB devices. The Data Acquisition Interface offers the
ability of monitoring and reporting the environmental condition of the
PC. It could monitor 4 positive analogue voltage inputs, 2 Fan speed
inputs, and one temperature input.
***Configurations:...
***Features:...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
**W83C553F System I/O Controller With PCI Arbiter c:sep95
***Info:
The W83C553F Enhanced System I/O (SIO) Controller with PCI Arbiter is
a highly integrated device intended for use in any Peripheral
Component Interconnect (PCI) system, supporting x86 or PowerPC
(non-x86) type microprocessors. It supports all PCI 2.1 compliant CPU
bridge implementations and directly interfaces with PCI and ISA
industry standard buses, including two direct drive IDE channels
supporting up to four peripherals.
The W83C553F is a universal PCI device which can be used with many
CPU-to-PCI bridge solution. The W83C553F includes 32-bit ISA DMA
addressing (rather than 24-bit) to simplify its use in systems using
re-compiled versions of 32-bit operating systems (such as Windows NT
running on PowerPC, Alpha, or other RISC CPU).
The peripheral controller integrated into the W83C553F includes two
enhanced seven channel 82C37A 32-bit DMA controllers that support fast
DMA transfers with a four byte line buffer to isolate the PCI bus from
the ISA bus, enhancing performance. Both DMA controllers support
scatter/gather data transfer capability.
The W83C553F Enhanced SIO controller provides the bridge between the
PCI bus and the ISA expansion bus. It also integrates a PCI bus master
IDE controller, an eight master PCI arbiter (which may be disabled if
desired) and many of the common I/O functions found in today's ISA
based PC systems. The W83C553F incorporates the logic for a complete
PCI interface (master and slave) and ISA interface (master and
slave). Also included is PCI and ISA arbitration, 14 level interrupt
controller, a 16-bit BIOS timer, three programmable counter/timers,
non-maskable-interrupt (NMI) control logic and register support for
power management break events.
The built-in Enhanced PCI IDE Controller is a highly integrated dual
port controller, providing a high performance data path between IDE
devices and the PCI bus. Four IDE chip select signals provide
accessing of up to four devices. Each device has its own programmable
registers for selecting 16-bit and 32-bit data pipelined transfer
rates, read-ahead and posted writes. A large 64 Byte DMA FIFO buffers
data to and from the IDE disks enabling the integrated scatter/gather
DMA controller to efficiently perform zero wait state burst transfers
across the PCI bus when enough data is available in the FIFO. Bus
master IDE significantly improves the overall system performance of a
multi-master PCI configuration by greatly reducing the bus and CPU
utilization required for the disk and CD-ROM interface. Burst data
transfers at 33 MHz can be sustained at 132 MB/s on the PCI bus.
The integrated bus-mastering PCI-IDE core is the original Sonata
W83789F core with some modification of interrupt routing. This
controller is fully compliant to Intel's Bus-Mastering Controller and
SFF8038i specifications. BIOS support has been incorporated in all the
leading BIOS companies' software. Driver software, previously tested
and qualified for the W83789F, is available from Winbond Systems
Laboratory for all major operating systems, including recompiled
PowerPC versions.
***Versions:...
***Features:...
**W83628F/29D PCI TO ISA Bridge Set c98...
**W83626F/D LPC TO ISA Bridge Set <00...
**
**Multi I/O:
**W83757 SUPER I/O CHIP <92...
**W83767F ?? Multi I/O [no datasheet]
**W83777F/87F Power I/O (Multi I/O) <95...
**W83877F WINBOND I/O (Multi I/O) <96...
**W83877TF/TG/TD WINBOND I/O (Multi I/O) c97...
**W83977F/G/AF/AG WINBOND I/O (Multi I/O) c97...
**W83977TF WINBOND I/O (Multi I/O) c97...
**W83977EF WINBOND I/O (Multi I/O) <98...
**W83977ATF WINBOND I/O (Multi I/O) <98...
**
**Disk Controller:
**W83759/A/F/AF Advanced VL-IDE Disk Controller <96...
**W83769 Local Bus IDE Solution <94...
**
**UARTS:
**W86C250A UART (equivalent of INS8C250A) [no datasheet]
**W86C450/P Universal Asynchronous Receiver/Transmitter <Jul89...
**W86C451 I/O controller for IBM PC/AT/XT <Jul89...
**W86C452 I/O controller for IBM PC/AT Jul89...
**W86C456 I/O controller [no datasheet] ?
**W860551/P UART with FIFO and Printer Port Controller <94...
**
**Other:...
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