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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
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*Logicstar...
**SL6012 Memory Mapper for PC-AT (74LS612 compatible) <Jul87
***Info:
The SL6012 Memory Mapper is intended for use in PC-AT design. It can
expand an address bus by 4 bits. In PC-AT applications, 4 bits of the
source address are used to select 1 of 16, eight bit map
registers. These registers are normally programmed (through software)
with the starting address of each memory page. The register data is
output directly for use as the most significant bits of the expanded
address bus. The 8 bits from the SL6012 are used along with the unused
source address bits to form the expanded address bus.
As shown in Table 1 [see datasheet], the SL6012 has three modes of
operation; read, write and map. Data may be written into, or read from
the Memory Mapper when chip select CSN is low. The register select
inputs (RS0 through RS3) select one of the sixteen map registers. When
RWN is low, data is written into a register from the data bus. When
RWN is high data is output from a Memory Mapper register to the data
bus.
The map mode of operation is selected when chip select CSN is high. In
this mode, the register data selected by the map address inputs (MA0
through MA3) will be available on the map outputs (MO0 through
MO7). Note that the map registers are addressed by either the RS
inputs or the MA inputs depending upon the operating mode. When MEN
(Map Enable) is low the map outputs (MO0-MO7) are active. When MEN is
high, the map outputs are at high impedance.
***Versions:...
***Features:...
**SL9010 System Controller (80286/80386SX/DX, 16/20/25MHz) <oct88...
**SL9020 Data Controller <oct88...
**SL9025 Address Controller <oct88...
**SL9090 Universal PC/AT Clock Chip <oct88...
**SL9250 Page Mode Memory Controller (16/20MHz 8MB Max) <oct88...
**SL9350 Page Mode Memory Controller (16/20/25MHz 16MB Max) <oct88...
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*Western Digital...
**WD7855 System controller for 80386SX <09/25/92
***Notes:...
***Info:
1.3 GENERAL DESCRIPTION
Western Digital's WD7855/LV single chip ISA System Controller is
designed for high-performance IBM PC/AT compatible platforms.
Available for desktop, portable or low voltage (LV) applications, the
WD7855/LV supports the 803868X microprocessor operating at speeds up
to 33 MHz.
The WD7855/LV incorporates seven high-performance system controller
functions which include the ISA bus interface, CPU interface, flexible
memory controller, DMA controller, interrupt controller, timers and
advanced power management. In combination with Western Digital’s
support devices, the WD7855/LV provides a highly flexible and powerful
desktop or portable platform design.
The WD7855/LV is designed to work with all variations of 80386SX
compatible microprocessors. It supports the traditional dynamic CPUs
with the industry's only Processor Power-down feature to minimize
power consumption. The WD7855/LV fully supports static microprocessors
such as the AMD Am386SXL with CPU Stop Clock, System Management
Interrupt and I/O trapping features. The WD7855/LV incorporates
special circuitry which allows for optimizing the cache performance
and maintaining cache coherency with cached CPUs such as the Cyrix
Cx4868LC.
1.3.1 Desktop Applications
The WD7855 provides a high performance solution with a flexible memory
controller architecture, including support for eight banks of two way
interleave memory and EMS 4.0 hardware. The WD7855/LV can fully
support an external look-aside cache or a combination primary and
secondary cache. This feature makes it particularly suitable for use
with cached microprocessors such as Cyrix Cx486SLC where it maintains
cache coherency via its built-in bus snooping capability. In addition,
the WD7855/LV supports Video Local Bus Interface (VLBI) for enhanced
graphics performance.
1.3.2 Portable Applications
The WD7855LV is an ideal choice because of its advanced power
management features and power saving 3.3 volt operation which delivers
long battery life in a compact footprint. This makes it a perfect
choice for laptop, notebook, pen based and palmtop computers.
The eight bank memory controller on the WD7855LV provides the user
with great flexibility in the selection of 3.3 volt DRAMs to meet
system memory requirements in low voltage platforms. The WD7855LV
memory controller supports JEDEC standard 3.3 volt DRAM in various
configurations, including the JEIDA standard 88-pin DRAM card.
The WD7855/LV can be paired with the appropriate support devices from
Western Digital to deliver the most efficient solution for any
platform. For 5 volt desktop or portable platforms, the WD7855LV can
be used with the WD76C20 Peripheral Controller and the WD76C30 I/O
Controller. Alternatively, the WD7855 can be used with the WD7615
Buffer Manager device and a generic Super I/O chip to implement a low
cost desktop platform. For 3.3 volt applications, the WD7855LV can be
used with the WD76C20ALV and WD76C30ALV, both of which incorporate
level translators (split rail operation). For subnotebook and palmtop
type applications, WD7625LV buffer manager can be added to the
WD7855LV based solution to achieve a very compact footprint.
The WD7855/LV is a fourth generation system controller device derived
from core chips with proven compatibility and design maturity in
several of the industry’s leading desktop and portable platforms.
Designed with the state of the art 0.9 micron high performance CMOS
process, the WD7855/LV family maintains architectural compatibility
with Western Digital's WD7600 and WD7700 systems logic chip sets while
incorporating many additional performance enhancements.
***Configurations:...
***Features:...
**WD7900/LP/LV System Chip Set for 80286 or 80386SX (Cache) <11/25/91...
**WD8110 System controller for 80386DX/486 <11/30/93...
**
**Support Chips:
**WD76C20x Floppy, RTC, IDE and Support Logic Device <11/25/91...
**WD76C30x Perip. Ctrl, Interrupt Multiplex, and Clock Gen <11/18/91...
**WD7615 Desktop Buffer Manager <04/15/92...
**WD7625 Desktop Buffer Manager <10/01/92...
**WD8120LV Super I/O [no datasheet] ?
**Other Chips:...
*Winbond...
*ZyMOS...
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