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**440 series:
***440FX (Natoma)       05/06/96...
***440LX (Balboa)       08/27/97...
***440BX (Seattle)      c:Apr'98...
***440DX (?)            c:?...
***440EX (?)            c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?)          05/17/99...
***440MX (Banister)     05/17/99...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**SL82C550   'Rossini' Pentium          [no datasheet]            c:95
***Notes:
from:
http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html

The Symphony  "Rossini" Chipset  (Symphony Labs:  10AD/4269) (9/13/95)
This is apparently a low-cost alternative to the Triton chipset, as it
operates  with up  to 66  MHz external  clock rates,  up to  two CPUs,
pipelined or non-pipelined, synchronous or [conventional] asynchronous
SRAM cache,  EDO RAM, and  does dual-port busmastering IDE.   It will,
apparently, adjust the voltages to  its various (CPU, PCI, cache, RAM)
buses  to suit  their requirements,  and will  control up  to six  PCI
masters.   It consists  of the  SL82C551 cache/memory  controller, the
SL82C522 data path controller, and the SL82C555 system I/O controller.

***Configurations:...
**
**Support Chips:
**SL82C365    Cache Controller (for 386DX/SX)                     c:91...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C114 Combination I/O chip                                      ?
***Info:...
***Versions:...
***Features:
o   Integrated peripheral controller that interfaces with several of 
    VLSI's Single Chip System/ISA Bus controllers
    - VL82C480
    - VL82C481
    - VL82C486
    - VL82C310
    - VL82C311
    - VL82C311L
o   Backwards compatible with the industry standard VL82C113A
o   146818A-Compatible real-time clock
o   114 additional bytes of battery-backed CMOS RAM
o   AT-compatible keyboard controller with integrated PS/2 mouse 
    support
o   Processor to ISA bus address latches and buffers, which support 
    16- and 32-bit processors.
o   Supports processors with write-back cache controllers
o   Real-time clock can be relocated via SA[15:0] address registers
o   Includes ISA bus refresh counters for decoupled refresh
o   1.0-micron CMOS 
o   100-lead MQFP (Metric Quad Flat Pack)

**Video: ...
**Disk:...
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**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...