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**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:
The 82498 Cache Controller and multiple 82493 Cache SRAMs combine with
the Pentium processor (735/90,  815/100) and future Pentium Processors
to form a CPU Cache chip set designed for high performance servers and
function-rich  desktops. The high-speed  interconnect between  the CPU
and  cache components has  been optimized  to provide  zero-wait state
operation. This CPU  Cache chip set is fully  compatible with existing
software,  and has new  data integrity  features for  mission critical
applications.

The 82498 Cache Controller implements the MESI write-back protocol for
full multiprocessing support.  Dual ported buffers and registers allow
the 82498  to concurrently  handle CPU bus,  memory bus,  and internal
cache operation for maximum performance.

The 82493 is a customized high-performance SRAM that supports 64-, and
128-bit  wide memory  bus widths,  32-,  and 64-byte  line sizes,  and
optional sectoring. The  data path between the CPU  bus and memory bus
is  separated  by  the  82493,  allowing  the  CPU  bus  to  handshake
synchronously,  asynchronously,  or   with  a  strobed  protocol,  and
allowing concurrent CPU bus and memory bus operations.

***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**VL82C114 Combination I/O chip                                      ?
***Info:...
***Versions:...
***Features:
o   Integrated peripheral controller that interfaces with several of 
    VLSI's Single Chip System/ISA Bus controllers
    - VL82C480
    - VL82C481
    - VL82C486
    - VL82C310
    - VL82C311
    - VL82C311L
o   Backwards compatible with the industry standard VL82C113A
o   146818A-Compatible real-time clock
o   114 additional bytes of battery-backed CMOS RAM
o   AT-compatible keyboard controller with integrated PS/2 mouse 
    support
o   Processor to ISA bus address latches and buffers, which support 
    16- and 32-bit processors.
o   Supports processors with write-back cache controllers
o   Real-time clock can be relocated via SA[15:0] address registers
o   Includes ISA bus refresh counters for decoupled refresh
o   1.0-micron CMOS 
o   100-lead MQFP (Metric Quad Flat Pack)

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