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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:
o   Two-Way, Set Associative, Secondary Cache for i860 XP 
    Microprocessor
o   50 MHz "No Glue" Interface with CPU
o   Configurable
    - Cache Size 256 or 512 Kbytes
    - Line Width 32, 64 or 128 Bytes
    - Memory Bus Width 64 or 128 Bits
o   Dual-Ported Structure Permits Simultaneous Operations on CPU and
    Memory Buses
o   Efficient MRU Way Prediction
    - Zero Wait States on MRU Hit
    - One Walt State on MRU Miss
o   Dynamically Selectable Update Policies
    - Write-Through
    - Write-Once
    - Write-Back
o   MESI Cache Consistency Protocol
o   Hardware Cache Snooping
o   Maintains Consistency with Primary Cache via Inclusion Principle
o   Flexible User-Implemented Memory Interface Enables Wide Range of
    Product Differentiation
    - Clocked or Strobed
    - Synchronous or Asynchronous
    - Plpelining
    - Memory Bus Protocol
o   82495XP Cache Controller Available in 208-Lead Ceramic Pin Grid 
    Array Package
o   82490XP Cache RAM Available in 84-Lead Plastic Quad Flatpack 
    Package

**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
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*OPTi...
**82C895         System/Power Management Controller (cached)   c:Sep94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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*Symphony...
*TI (Texas Instruments)...
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*Unresearched:...
*VIA...
*VLSI...
**VL82C594/596/597 Wildcat                                         c95
***Notes:...
***Info:
Wildcat is  a 586-class PCI  chipset comprised of the  VL82C594 System
Controller, two  VL82C595 Data Buffers, and  the VL82C596/VL82C597 ISA
Bridge. The VL82C596 is for single processor systems using a P5, P54C,
P54CS, P55C,  K5, or M1 CPU.  The VL82C597 includes the  Intel IO APIC
for use  in Intel-based dual processor systems.  The VL82C594 supports
up to 1G of  fast page mode or EDO DRAM. It also  supports up to 1M of
async,  sync, or  PBSRAM.  The  VL82C595 data  buffers  work with  the
VL82C594  to  provide 3smart2  write  buffering  to yield  exceptional
performance with  or without an L2  cache. The VL82C596/597  acts as a
PCI-ISA bridge and incorporates advanced power management features and
a Real-Time Clock with integrated write protection.

***Configurations:...
***Features:...
**I/O Chips:
**VL82C106 Combination I/O chip                                      ?...
**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
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**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
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