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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**HT44          Secondary Cache                                c:Jun92
***Info:
The  HT44 is  a  look-aside write-through,  80486SX,  486DX or  486DX2
secondary cache  controller. It is  packaged in an  inexpensive 84-pin
plastic-leaded chip carrier (PLCC).

Architecture
With  its look-aside architecture,  the HT44  fits beside  the CPU-to-
Memory bus  and not in  the data path.   Therefore, once the  HT44 has
been designed  into a  486 system, it  can be populated  for secondary
cache systems or left vacant for non-secondary cache systems. The HT44
is direct-mapped to the available address space.

Performance
The  HT44  has a  number  of  performance  enhancing features.   These
include zero-waitstate burst line fills  to the 486 on secondary cache
hits, and simultaneous 486 and secondary cache updates on read misses.

Memory Configurations
The HT44 supports  cache sizes from 32KBytes to  1MB. Both synchronous
and asynchronous  SRAMs are supported.  25ns SRAMs are  sufficient for
zero-wait-state operation at 33MHz.

Chip Set Support
The HT44 can,  be implemented with minimal glue logic  in a 486 system
with the  HTK340 (code  name Shasta) chip  set.  The registers  in the
HTK340  allow  for programming  of  non-cacheable and  write-protected
areas of  memory. The  HTK340 will support  the HT44  with synchronous
SRAMs only.   Future Headland chip sets will  support both synchronous
and asynchronous SRAM designs.

The HT44  can also be used  with some third-party  chip sets, however,
additional glue logic may be required.

***Versions:...
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*HMC (Hulon Microelectronics)...
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*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C481         System/Cache/ISA bus Controller                 c92
***Basics:...
***Info:...
***differences to the VL82C480:
"It  also  supports  486  family   CPUs  that  contain  an  integrated
write-back cache (P24T, etc.)"

"It can also  perform 3-2-2-2 cycle reads for support  of slower SRAMs
at higher frequences."

"The HITM#  input is provided to  force the VL82C481 to  abort DRAM or
cache cycles when a hit on a dirty line in the CPU write-back cache is
detected. the DRAM or cache  cycle is subsequently restarted after the
CPU has written back the dirty data"

"Further support for devices that reside  on the local bus is provided
through use of the <*LDEV#*> (Local Bus Access) input, which deselects
the VL82C481 during  CPU cycles <*and causes the  VL82C481 to generate
VL-Bus  memory  cycles  when  active  dur- ing  DMA  and  Master  Mode
cycles*>."

[areas  marked <*  *> are  differences or  additions, in  the VL82C480
LDEV# is LBA#]

<*On power-on  default,*> The  chip does not  generate parity  for CPU
writes to DRAM, but does  generate cache write-back cycles. <*However,
a mode is  provided in which the VL82C481 will  generate parity during
either CPU writes or VL master writes.*>

[areas marked <* *> are additions]

***Configurations:...
***Features:...
**VL82C486         Single-Chip 486, SC486, Controller                ?...
**VL82C425         486 Cache controller                              ?...
**????????         Cheetah 486, PCI [no datasheet]                   ?...
**VL82C3216        Bus Expanding Controller Cache with write buffer  ?...
**VL82C521/522     Lynx/M                                            ?...
**VL82C530         Eagle Ð                                         c95...
**VL82C541/543     Lynx                                            c95...
**VL82C591/593     SuperCore 590                                   c94...
**VL82C594/596/597 Wildcat                                         c95...
**I/O Chips:
**VL82C106 Combination I/O chip                                      ?...
**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
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**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
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