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*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
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*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:
The Intel 82495XP cache controller and 82490XP cache RAM, when coupled
with a user-implemented memory bus controller, provide a second-level
cache subsystem that eliminates the memory latency and bandwidth
bottleneck for a wide range of multiprocessor systems based on the
i860 XP microprocessor. The CPU interface is optimized to serve the
i860 XP microprocessor with zero wait states at up to 50 MHz. A
secondary cache built from the 82495XP and 82490XP isolates the CPU
from the memory subsystem; the memory can run slower and follow a
different protocol than the i860 XP microprocessor.
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C496/497 486-VIP 486 Green PC VESA/ISA/PCI Chipset <95
***Info:...
***Configurations:...
***Features:...
**85C501/502/503 Pentium/P54C PCI/ISA Chipset <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5120 Pentium PCI/ISA Chipset (Mobile) <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5511/5512/5513 Pentium PCI/ISA <06/14/95...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96...
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C480 System/Cache/ISA bus Controller ?
***Info:...
***Configurations:...
***Features:
o Fully compatible with 486-based ISA bus systems
o Power-on reset option selects various operational modes
o Up to 40 MHz CPU operation
o Replaces the following peripheral logic on the motherboard:
- Two 82C37A DMA controllers
- 74LS612 memory mappers (extended to support 64 MB)
- Two 82C59A interrupt controllers
- 82C54 timer
- 82284 clock generator and ready interface
- 82288 bus controller
o Memory controller features include:
- Up to 64 MB system memory
- 256K, 1M or 4M DRAM
- Double-sided SIMMs
- Page Mode DRAM access
- Two-way interleave support
- Programmable RAS#/CAS# timing
- Burst read and write support
- Parity generation/checking for on-board DRAM
- Staggered RAS# refresh
o Supports:
- One to four banks 32 bits wide
- 8- or 16-bit wide BIOS ROM
- shadow RAM in the 640K-1M area
- Asynchronous ISA bus operation up to 16 MHz
- Relocation of slot ROMs
- Access to devices residing on the local bus
- Weitek 4167 numeric coprocessor
o 0.8-micron CMOS technology
o 208-lead MQFP (metric quad flat pack)
o Includes:
- Memory/refresh controller
- Port A, B, and NMI logic
- Bus steering logic
- Turbo control
- hidden refresh
- Three-stateable outputs for board testing
o Selectable slow DRAM refresh saves power
o On-chip write-back cache controller:
- External tags
- Direct map
- Separate "dirty" RAM not required
- 2-1-1-1 reads with two banks, 2-2-2-2 with one bank
- 32 KB to 1MB cache size
- One wait state writes on cache-hits
- Optional zero wait state writes
- Optional one wait state reads
o Other features:
- Programmable for 10- or 16-bit internal I/O addressing
- Programmable drive on the DRAM and ISA bus signals
- Programmable memory access to define "fast-bus", local bus, slot
bus, non-cacheable and write-protect areas
- Input pin defines access to local bus devices
**VL82C481 System/Cache/ISA bus Controller c92...
**VL82C486 Single-Chip 486, SC486, Controller ?...
**VL82C425 486 Cache controller ?...
**???????? Cheetah 486, PCI [no datasheet] ?...
**VL82C3216 Bus Expanding Controller Cache with write buffer ?...
**VL82C521/522 Lynx/M ?...
**VL82C530 Eagle Ð c95...
**VL82C541/543 Lynx c95...
**VL82C591/593 SuperCore 590 c94...
**VL82C594/596/597 Wildcat c95...
**I/O Chips:
**VL82C106 Combination I/O chip ?...
**VL82C107 SCAMP Combination I/O chip ?...
**VL82C108 TOPCAT Combination I/O chip ?...
**VL82C110 Combination I/O chip ?...
**VL82C113 SCAMP Combination I/O chip ?...
**VL82C114 Combination I/O chip ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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