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*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
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*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:
The Intel 82495XP cache controller and 82490XP cache RAM, when coupled
with a user-implemented memory bus controller, provide a second-level
cache subsystem that eliminates the memory latency and bandwidth
bottleneck for a wide range of multiprocessor systems based on the
i860 XP microprocessor. The CPU interface is optimized to serve the
i860 XP microprocessor with zero wait states at up to 50 MHz. A
secondary cache built from the 82495XP and 82490XP isolates the CPU
from the memory subsystem; the memory can run slower and follow a
different protocol than the i860 XP microprocessor.
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C491/392 486WB PC/AT Chipset <04/21/91
***Info:...
***Configurations:...
***Features:...
**82C493/392 486SXWB <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet] ?...
**82C495SLC DXSLC 386/486 Low Cost Write Back c:92...
**82C495XLC PC/AT Chip Set c:93...
**82c496A/B DXBB PC/AT Chipset <Mar92...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92...
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
**VL82C380 Single chip 386DX PC/AT Controller +on-chip cache ?
***Info:...
***Configuration:...
***Features:
o Highly integrated system solution using VL82C380 single-chip
ISA controller, VL82C113A Combination I/O chip and 3 TTLs
o Supports one- or two-bank write-back cache
- External TAGs
- 32 Kbyte to 1 Mbyte cache size
- 0 or 1 wait state writes
- Separate dirty RAM not required; first write to clean, valid
line sets dirty bit
o Caches main system DRAM only
o Maintains full coherency during DMA/MASTER mode cycles
o Optional remap of video and hard disk ROM BIOS onto motherboard,
allowing use of single BIOS ROM
o Optional bus acceleration for video accesses, with programmable
address regions
o Software-configurable
o Utilizes proven 8254, 8237, 8259 megacalls used in all previous
VLSI Technology PC/AT chipsets
o High-performance memory controller:
- One wait state red up to 33 MHz, Zero wait state reads up to
40 MHz
- Automatic configuring of Bank start address
- Each bank individually configurable for any supported DRAM type
- shadow RAM support form 640K to 1M in 16K segments
- Staggered refresh reduces power supply peak currents
- Decoupled-mode refresh improves performance
- Programmable refresh frequency for support of slow-refresh DRAMs
- Up to 64 Mbytes of motherboard memory in one to four banks using
256K, 1M, and/or 4Mbit DRAM, all motherboard memory is cacheable
- Direct-drive up to 2 banks (32 Mbyte) of motherboard memory
- Two-way page mode interleave
- Supports 32-bit ini-interleaved or interleaved configurations
- Programmable RAS/CAS timing supported for Cycle-start, Trp,
Trcd, and Tacs
**VL82C325 VL82C386SX System Cache controller ?...
**VL82C335 VL82C386DX System Cache ctrl. [no d.sheet] ?...
**VL82C315A/322A/3216 Kodiak 32-Bit Low-Voltage Chip Set ?...
**VL82C420/144/146 SCAMP IV [no datasheet, some info] c93...
**VL82C480 System/Cache/ISA bus Controller ?...
**VL82C481 System/Cache/ISA bus Controller c92...
**VL82C486 Single-Chip 486, SC486, Controller ?...
**VL82C425 486 Cache controller ?...
**???????? Cheetah 486, PCI [no datasheet] ?...
**VL82C3216 Bus Expanding Controller Cache with write buffer ?...
**VL82C521/522 Lynx/M ?...
**VL82C530 Eagle Ð c95...
**VL82C541/543 Lynx c95...
**VL82C591/593 SuperCore 590 c94...
**VL82C594/596/597 Wildcat c95...
**I/O Chips:
**VL82C106 Combination I/O chip ?...
**VL82C107 SCAMP Combination I/O chip ?...
**VL82C108 TOPCAT Combination I/O chip ?...
**VL82C110 Combination I/O chip ?...
**VL82C113 SCAMP Combination I/O chip ?...
**VL82C114 Combination I/O chip ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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