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**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
**HT44 Secondary Cache c:Jun92
***Info:
The HT44 is a look-aside write-through, 80486SX, 486DX or 486DX2
secondary cache controller. It is packaged in an inexpensive 84-pin
plastic-leaded chip carrier (PLCC).
Architecture
With its look-aside architecture, the HT44 fits beside the CPU-to-
Memory bus and not in the data path. Therefore, once the HT44 has
been designed into a 486 system, it can be populated for secondary
cache systems or left vacant for non-secondary cache systems. The HT44
is direct-mapped to the available address space.
Performance
The HT44 has a number of performance enhancing features. These
include zero-waitstate burst line fills to the 486 on secondary cache
hits, and simultaneous 486 and secondary cache updates on read misses.
Memory Configurations
The HT44 supports cache sizes from 32KBytes to 1MB. Both synchronous
and asynchronous SRAMs are supported. 25ns SRAMs are sufficient for
zero-wait-state operation at 33MHz.
Chip Set Support
The HT44 can, be implemented with minimal glue logic in a 486 system
with the HTK340 (code name Shasta) chip set. The registers in the
HTK340 allow for programming of non-cacheable and write-protected
areas of memory. The HTK340 will support the HT44 with synchronous
SRAMs only. Future Headland chip sets will support both synchronous
and asynchronous SRAM designs.
The HT44 can also be used with some third-party chip sets, however,
additional glue logic may be required.
***Versions:...
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*HMC (Hulon Microelectronics)...
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*Unresearched:...
*VIA...
*VLSI...
**VL82C316 SCAMP II, PC/AT-Compatible System Controller ?
***Info:...
***Configurations:...
***Features:
o Compatible with 386SX-based PC/AT compatible systems
o Up to 33 MHz system clock
o Replaces 11 peripheral devices on the motherboard:
- Two 82C37A DMA controllers
- 74LS612 memory mapper
- Two 82C59A interrupt controllers
- 82C54 timer
- 82284 clock generator and ready interface
- 82288 bus controller
- Keyboard Controller
- Real-time clock
o Includes:
- Memory/refresh controller
- Port B and NMI logic
- Bus steering logic
- Parity generation checking logic
- Turbo Mode control logic
- Staggered refresh to minimize power supply load variations
- Three-state control pin for board level testability
o Supports:
- Up to 16 MB system memory
- PCMCIA 1.0 IC Memory Card mapping logic
- VL82C325 (SX) Cache Controller compatible
- Four 16- or 18-bit wide banks of 256K, 1M, or 4M DRAM or eight
- 16-bit wide banks of 512K x 8 DRAM
- Shadow RAM in 640K to 1M range
- 387SX numeric coprocessors
- 8- or 16-bit wide BIOS ROMs
- Synchronous or asynchronous slot bus operation up to 16 MHz
- Relocation of video and slot ROMs
o Power saving features include:
- Sleep and Suspend Modes
- Slow DRAM refresh
- CAS-before-RAS and Self-Refresh
- Sleep Mode refresh switch to 32 kHz clock
- Leakage Control in Stop Clock or Suspend Mode
- CPU on or off option in Suspend Mode
- Low-power page interleave memory mode
- Fully static operation
- DMA power management mode
- Full SMM (system Management Mode) and I/O breal support
- Supports standard Sleep Mode for interface to the VL82C323
Power Management Unit (PMU) or other third party PMUs
- Programmable, extendable peripheral cycle
- Disable software coprocessor reset option
- Option for automatic bus speed-up on video or PCMCIA accesses
- Full support for local bus peripherals
- Separate power pins for ISA bus signals allows ISA to be powered
down independently of other interfaces
o Other advanced features:
- Programmable I/O decode for 10 or 16-bit addresses
- Hardware configurable setup to minimize custom BIOS requirements
- Programmable drive current to reduce ringing on DRAM
o 0.8-micron CMOS technology
o 208-lead metric quad flat pack (MQFP)
**VL82C323 SCAMP II, 5 Volt Power Management Unit (PMU) ?...
**VL82C380 Single chip 386DX PC/AT Controller +on-chip cache ?...
**VL82C325 VL82C386SX System Cache controller ?...
**VL82C335 VL82C386DX System Cache ctrl. [no d.sheet] ?...
**VL82C315A/322A/3216 Kodiak 32-Bit Low-Voltage Chip Set ?...
**VL82C420/144/146 SCAMP IV [no datasheet, some info] c93...
**VL82C480 System/Cache/ISA bus Controller ?...
**VL82C481 System/Cache/ISA bus Controller c92...
**VL82C486 Single-Chip 486, SC486, Controller ?...
**VL82C425 486 Cache controller ?...
**???????? Cheetah 486, PCI [no datasheet] ?...
**VL82C3216 Bus Expanding Controller Cache with write buffer ?...
**VL82C521/522 Lynx/M ?...
**VL82C530 Eagle Ð c95...
**VL82C541/543 Lynx c95...
**VL82C591/593 SuperCore 590 c94...
**VL82C594/596/597 Wildcat c95...
**I/O Chips:
**VL82C106 Combination I/O chip ?...
**VL82C107 SCAMP Combination I/O chip ?...
**VL82C108 TOPCAT Combination I/O chip ?...
**VL82C110 Combination I/O chip ?...
**VL82C113 SCAMP Combination I/O chip ?...
**VL82C114 Combination I/O chip ?...
**Video: ...
**Disk:...
**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
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