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**440 series:
***440FX (Natoma) 05/06/96...
***440LX (Balboa) 08/27/97...
***440BX (Seattle) c:Apr'98...
***440DX (?) c:?...
***440EX (?) c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?) 05/17/99...
***440MX (Banister) 05/17/99...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
**SL82C550 'Rossini' Pentium [no datasheet] c:95
***Notes:
from:
http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html
The Symphony "Rossini" Chipset (Symphony Labs: 10AD/4269) (9/13/95)
This is apparently a low-cost alternative to the Triton chipset, as it
operates with up to 66 MHz external clock rates, up to two CPUs,
pipelined or non-pipelined, synchronous or [conventional] asynchronous
SRAM cache, EDO RAM, and does dual-port busmastering IDE. It will,
apparently, adjust the voltages to its various (CPU, PCI, cache, RAM)
buses to suit their requirements, and will control up to six PCI
masters. It consists of the SL82C551 cache/memory controller, the
SL82C522 data path controller, and the SL82C555 system I/O controller.
***Configurations:...
**
**Support Chips:
**SL82C365 Cache Controller (for 386DX/SX) c:91...
**SL82C465 Cache Controller (for 486/386DX/SX) c:91...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97
***Info:...
***Versions:...
***Features:
o Inter-operable with VIA and other Host-to-PCI Bridges
- Combine with VT82C597 for a complete 66MHz Socket-7 PCI / AGP /
ISA system (Apollo VP3)
- Combine with VT82C598 for a complete 66 / 75 / 83 / 100MHz
Socket-7 PCI / AGP / ISA system (Apollo MVP3)
- Combine with VT82C691 for a complete Socket-8 or Slot-1 PCI /
ISA system (Apollo Pro)
- Inter-operable with Intel or other Host-to-PCI bridges for a
complete PC97 compliant PCI / AGP / ISA system
o Pin-compatible upgrade for PIIX4 for existing designs
o PC98 Compliant PCI to ISA Bridge
- Integrated ISA Bus Controller with integrated DMA, timer, and
interrupt controller
- Integrated Keyboard Controller with PS2 mouse support
- Integrated DS12885-style Real Time Clock with extended 256 byte
CMOS RAM and Day/Month Alarm for ACPI
- Integrated USB Controller with root hub and two function ports
- Integrated UltraDMA-33 master mode EIDE controller with enhanced
PCI bus commands
- PCI-2.1 compliant with delay transaction
- Eight double-word line buffer between PCI and ISA bus
- One level of PCI to ISA post-write buffer
- Supports type F DMA transfers
- Distributed DMA support for ISA legacy DMA across the PCI bus
- Sideband signal support for PC/PCI and serial interrupt for
docking and non-docking applications
- Fast reset and Gate A20 operation
- Edge trigger or level sensitive interrupt
- Flash EPROM, 2Mb EPROM and combined BIOS support
- Supports positive and subtractive decoding
- Supports external APIC interface for symmetrical multiprocessor
configurations
o UltraDMA-33 Master Mode PCI EIDE Controller
- Dual channel master mode PCI supporting four Enhanced IDE
devices
- Transfer rate up to 33MB/sec to cover PIO mode 4, multi-word DMA
mode 2 drives, and UltraDMA-33 interface
- Thirty-two levels (doublewords) of prefetch and write buffers
- Dual DMA engine for concurrent dual channel operation
- Bus master programming interface for SFF-8038i rev.1.0 and
Windows-95 compliant
- Full scatter gather capability
- Support ATAPI compliant devices including DVD devices
- Support PCI native and ATA compatibility modes
- Complete software driver support
- Supports glue-less “Swap-Bay” option with full electrical
isolation
o Universal Serial Bus Controller
- USB v.1.0 and Intel Universal HCI v.1.1 compatible
- Eighteen level (doublewords) data FIFO with full scatter and
gather capability
- Root hub and two function ports
- Integrated physical layer transceivers with over-current
detection status on USB inputs
- Legacy keyboard and PS/2 mouse support
o System Management Bus Interface
- Host interface for processor communications
- Slave interface for external SMBus masters
o Sophisticated PC97-Compatible Mobile Power Management
- Supports both ACPI (Advanced Configuration and Power Interface)
and legacy (APM) power management
- ACPI v1.0 Compliant
- APM v1.2 Compliant
- CPU clock throttling and clock stop control for complete ACPI C0
to C3 state support
- PCI bus clock run and PCI/CPU clock generator stop control
- Supports multiple system suspend types: power-on suspends with
flexible CPU/PCI bus reset options, suspend to DRAM, and suspend
to disk (soft-off), all with hardware automatic wake-up
- Multiple suspend power plane controls and suspend status
indicators
- One idle timer, one peripheral timer and one general purpose
timer, plus 24/32-bit ACPI compliant timer
- Normal, doze, sleep, suspend and conserve modes
- Global and local device power control
- System event monitoring with two event classes
- Primary and secondary interrupt differentiation for individual
channels
- Dedicated input pins for power and sleep buttons, external modem
ring indicator, and notebook lid open/close for system wake-up
- Up to 22 general purpose input ports and 31 output ports
- Multiple internal and external SMI sources for flexible power
management models
- Two programmable chip selects and one microcontroller chip
select
- Enhanced integrated real time clock (RTC) with date alarm, month
alarm, and century field
- Thermal alarm support
- Cache SRAM power-down control
- Hot docking support
- I/O pad leakage control
o Plug and Play Controller
- PCI interrupts steerable to any interrupt channel
- Three steerable interrupt channels for on-board plug and play
devices
- Microsoft Windows 95TM and plug and play BIOS compliant
o Built-in NAND-tree pin scan test capability
o 0.5u, 3.3V, low power CMOS process
o Single chip 324 pin BGA
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
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