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**82395SX Smart Cache 12/17/90
***Notes:...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
**HT18 80386SX Single Chip c:Sep91
***Info:
The HT18 is an advanced PC/AT compatible, single-chip 80386SX design
solution. This highly integrated single chip allows simple, low cost
system design options while featuring high performance, low power
consumption, and minimum board space requirements. Advanced memory
management features include support for page mode, with 2 or 4-way
interleaving in both pipelined and non-pipelined modes(18A/B only).
Extended Hardware EMS options include dual sets of 32 registers with
multiple context operation. Revisions A/B support 256K and 1M DRAMs in
1 by 1, 1 by 4, and 1 by 9 device configurations. Rev C supports 4M
devices, as well. A Shadow RAM option for System Video BIOS and dual
or single system ROM BIOS support adds to overall design versatility.
A complete PC/AT compatible system with advanced features may be
implemented with minimal external support logic. The HT18 performs all
CPU and peripheral support functions in a single chip. Integrated
device functions include DMA Controllers, a Memory Mapper, Timers,
Counters, Interrupt Controllers, a Bus Controller and all supporting
circuitry for PC core logic requirements. An asynchronous AT Bus clock
allows for a constant 8MHz Bus clock rate for highest bus device
compatibility as defined in IEEE Spec P996. This device is packaged in
a 208-pin Plastic Quad Flat Pack combining several external buffers
into this space saving solution.
***Configurations:...
***Features:...
**HT21 386SX/286 Single Chip (20 MHz) c:Aug91...
**HT22 386SX/286 Single Chip (25 MHz) c:Sep91...
**HT25 3-volt Core Logic for 386SX c:Dec92...
**HT35 Single-Chip Peripheral Controller [partial info] ?...
**HTK320 386DX Chip Set c:Sep91...
**HTK340 "Shasta" 486 Chip Set c:Jun92...
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C586/A/B PCI Integrated Peripheral Controller <10/13/96
***Info:...
***Versions:...
***Features:
o PC97 Compliant PCI to ISA Bridge
- Integrated ISA Bus Controller with integrated DMA, timer, and
interrupt controller
- Integrated keyboard controller with PS2 mouse support
- Integrated DS12885 style real time clock with extended 128 byte
CMOS RAM
- Integrated USB controller with root hub and two function ports
- Integrated master mode enhanced IDE controller with enhanced PCI
bus commands
- PCI-2.1 compliant with delay transaction
- Four double-word line buffer between PCI and ISA bus
- Supports type F DMA transfers
- Fast reset and Gate A20 operation
- Edge trigger or level sensitive interrupt
- Flash EPROM, 2MB EPROM and combined BIOS support
- Programmable ISA bus clock
o Inter-operable with Intel and other Host-to-PCI Bridges
- Combine with VT82C595 for a complete Pentium / PCI / ISA system
(Apollo VP2)
- Combine with VT82C685/687 for a complete Pentium-Pro /PCI / ISA
system (Apollo P6)
- Inter-operable with other Intel or non-Intel Host-to-PCI bridges
for a complete PC97 compliant PCI/ISA system
o Enhanced Master Mode PCI IDE Controller with Extension to
UltraDMA-33
- Dual channel master mode PCI supporting four Enhanced IDE
devices
- Transfer rate up to 22MB/sec to cover PIO mode 4 and multi-word
DMA mode 2 drives and beyond
- Extension to UltraDMA-33 / ATA-33 interface for up to 33MB/sec
transfer rate
- Sixteen levels (doublewords) of prefetch and write buffers
- Interlaced commands between two channels
- Bus master programming interface for SFF-8038i rev.1.0 and
Windows-95 compliant
- Full scatter and gather capability
- Support ATAPI compliant devices
- Support PCI native and ATA compatibility modes
- Complete software driver support
o Universal Serial Bus Controller
- USB v.1.0 and Intel Universal HCI v.1.1 compatible
- Eighteen level (doublewords) data FIFO with full scatter and
gather capability
- Root hub and two function ports with integrated physical layer
transceivers
- Legacy keyboard and PS/2 mouse support
o Sophisticated Power Management
- Normal, doze, sleep, suspend and conserve modes
- System event monitoring with two event classes
- One idle timer, one peripheral timer and one general purpose
timer
- More than ten general purpose input and output ports
- Seven external event input ports with programmable SMI condition
- Complete leakage control when external component is in power off
state
- Primary and secondary interrupt differentiation for individual
channels
- Clock stretching, clock throttling and clock stop control
- Multiple internal and external SMI sources for flexible power
management models
- APM 1.2 compliant
- Pin-compatible upgrade to VT82C586B for OnNow / ACPI (Advanced
Configuration and Power Interface) power-management support,
256-byte extended CMOS, Distributed DMA, and I2C capabilities
o Plug and Play Controller
- PCI interrupts steerable to any interrupt channel
- Dual interrupt and DMA channel controllers for on-board plug and
play devices
- Microsoft Windows 95 and plug and play BIOS compliant
o Built-in Nand-tree pin scan test capability
o 0.5um mixed voltage, high speed and low power CMOS process
o Single chip 208 pin PQFP
**VT82C596/A Mobile PCI Integrated Peripheral Controller <11/05/97...
**VT82C686A/B PCI Super-I/O Integrated Peripheral Ctrl. <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
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