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*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**800 series
***810         (Whitney)       04/26/99...
***810L        (Whitney)       04/26/99...
***810-DC100   (Whitney)       04/26/99...
***810e        (Whitney)       09/27/99...
***810e2       (Whitney)       01/03/01...
***815         (Solano)        06/19/00...
***815e        (Solano-2)      06/19/00...
***815em       (Solano-?)      10/23/00...
***815ep       (Solano-3)      c:Nov'00...
***815p        (Solano-3)      c:Mar'01...
***815g        (Solano-3)      c:Sep'01...
***815eg       (Solano-3)      c:Sep'01...
***820         (Camino)        11/15/99...
***820e        (Camino-2)      06/05/00...
***830M        (Almador)       07/30/01...
***830MP       (Almador)       07/30/01...
***830MG       (Almador)       07/30/01...
***840         (Carmel)        10/25/99...
***845         (Brookdale)     09/10/01...
***845MP       (Brookdale-M)   03/04/02...
***845MZ       (Brookdale-M)   03/04/02...
***845E        (Brookdale-E)   05/20/02...
***845G        (Brookdale-G)   05/20/02...
***845GL       (Brookdale-GL)  05/20/02...
***845GE       (Brookdale-GE)  10/07/02...
***845PE       (Brookdale-PE)  10/07/02...
***845GV       (Brookdale-GV)  10/07/02...
***848P        (Breeds Hill)   c:Aug'03
Chips:  
[82848P] (MCH) [82801EB/R] (ICH5/ICH5R)	
CPUs:          P4, Pentium D, Celeron, Celeron D
DRAM Types:    Dual channel DDR 266/333/400
Mem Rows:      --
DRAM Density:  ?
Max Mem:       2GB 
ECC/Parity:    ECC
AGP speed:     8x
Bus Speed:     400/533/800 MT/s (100/133/200 MHz QDR)
PCI Clock/Bus: 1/3 1/4 1/6 PCI 2.3


***850         (Tehama)        11/20/00...
***850E        (Tehama-E)      05/06/02...
***852GM       (Montara-GM)    01/14/03...
***852GMV      (Montara-GM)    ???...
***852PM       (Montara-GM)    06/11/03...
***852GME      (Montara-GM)    06/11/03...
***854         (?)             04/11/05...
***855GM       (Montara-GM)    03/12/03...
***855GME      (Montara-GM)    03/12/03...
***855PM       (Odem)          03/12/03...
***860         (Colusa)        05/21/01...
***865G        (Springdale)    05/21/03...
***865PE       (Springdale-PE) 05/21/03...
***865P        (Springdale-P)  05/21/03...
***865GV       (Springdale-GV) c:Sep'03...
***875P        (Canterwood)    04/14/03...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?
***Notes:...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C590     Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97
***Info:...
***Configurations:...
***Features:
o   PCI/ISA Green PC Ready
    - Supports 3.3V or 5V interface to CPU, system memory, and / or 
      PCI bus
    - Supports CPUs with internal voltages below 3.3V
    - PC-97 compatible using VT82C586B South Bridge with ACPI Power 
      Management
o   High Integration
    - Single chip implementation for 64-bit Pentium-CPU, 64-bit system 
      memory, and 32-bit PCI interface
    - VT82C590 Apollo VP2 Chipset: VT82C595 system controller and 
      VT82C586B PCI to ISA bridge
    - Chipset includes UltraDMA-33 EIDE, USB, and Keyboard / PS2-Mouse 
      Interfaces plus RTC / CMOS on chip
    - Six TTLs for a complete main board implementation
o   Flexible CPU Interface
    - Supports 64-bit Pentium, AMD 5k86 , AMD 6k86 and Cyrix 6x86 CPUs
    - CPU external bus speed up to 66 Mhz (internal 200Mhz and above)
    - Supports CPU internal write-back cache
    - System management interrupt, memory remap and STPCLK mechanism
    - Cyrix 6X86 linear burst support
    - CPU NA# / Address pipeline capability
o   Advanced Cache Controller
    - Direct map write back or write through secondary cache
    - Pipelined burst synchronous SRAM (PBSRAM) cache support (with 
      global write enable feature)
    - Flexible cache size: 0K/256K/512K/1M/2MB
    - 32 byte line size to match the primary cache
    - Integrated 10-bit tag comparator
    - 3-1-1-1 read/write timing for PBSRAM access at 66 Mhz
    - 3-1-1-1-1-1-1-1 back to back read timing for PBSRAM access at 
      66 Mhz
    - Sustained 3 cycle write access for PBSRAM access or CPU to DRAM 
      and PCI bus post write buffers at 66 Mhz
    - Data streaming for simultaneous primary and secondary cache 
      line fill
    - System and video BIOS cacheable and write-protect
    - Programmable cacheable region and cache timing
o   Fast DRAM Controller
    - Fast Page Mode/EDO/Synchronous-DRAM support in a mixed 
      combination
    - Mixed 1M/2M/4M/8M/16MxN DRAMs
    - 6 banks up to 512MB DRAMs
    - Flexible row and column addresses
    - 64-bit or 32-bit data width in arbitrary mixed combination
    - 3.3v and 5v DRAM without external buffers
    - Optional bank-by-bank ECC (single-bit error correction and 
      multi-bit error detection) for DRAM integrity
    - Two-bank interleaving for 16Mbit SDRAM support
    - Two-bank and four bank interleaving for 64Mbit SDRAM support 
      (14 MA lines)
    - Four cache lines (16 quadwords) of CPU/cache to DRAM write 
      buffers
    - Concurrent DRAM writeback
    - Speculative DRAM access
    - Read around write capability for non-stalled CPU read
    - Burst read and write operation
    - 4-2-2-2 on page, 7-2-2-2 start page and 9-2-2-2 off page timing 
      for EDO DRAMs at 50/60 MHz
    - 5-2-2-2 on page, 8-2-2-2 start page and 11-2-2-2 off page timing 
      for EDO DRAMs at 66 MHz
    - 6-1-1-1 on page, 8-1-1-1 start page and 10-1-1-1 off page for 
      SDRAMs at 66 MHz
    - 5-2-2-2-3-1-2-2 back-to-back access for EDO DRAM at 66 MHz
    - 6-1-1-1-3-1-1-1 back-to-back access for SDRAM at 66 MHz
    - BIOS shadow at 16KB increment
    - Decoupled and burst DRAM refresh with staggered RAS timing
    - Programmable refresh rate, CAS-before-RAS refresh and refresh 
      on populated banks only
o   Intelligent PCI Bus Controller
    - 32 bit 3.3/5v PCI interface
    - Synchronous divide-by-two PCI bus interface
    - PCI master snoop ahead and snoop filtering
    - PCI master peer concurrency
    - Synchronous bus to CPU clock with divide-by-two from the CPU 
      clock
    - Automatic detection of data streaming burst cycles from CPU to 
      the PCI bus
    - Five levels (double-words) of CPU to PCI posted write buffers
    - Byte merging in the write buffers to reduce the number of PCI 
      cycles and to create further PCI bursting possibilities
    - Zero wait state PCI master and slave burst transfer rate
    - PCI to system memory data streaming up to 132Mbyte/sec
    - Forty-eight levels (double-words) of post write buffers from PCI 
      masters to DRAM
    - Sixteen levels (double-words) of prefetch buffers from DRAM for 
      access by PCI masters
    - Enhanced PCI command optimization (MRL, MRM, MWI, etc.)
    - Complete steerable PCI interrupts
    - Supports L1 write-back forward to PCI master read to minimize 
      PCI read latency
    - Supports L1 write-back merged with PCI master post-write to 
      minimize DRAM utilization
    - Provides transaction timer to fairly arbitrate between PCI 
      masters
    - PCI-2.1 compliant
o   Built-in nand-tree pin scan test capability
o   0.6um mixed voltage, high speed / low power CMOS process
o   328 pin Low-Profile BGA Package

**VT82C597/AT  Apollo VP3, Single-Chip for Pentium with AGP  <10/03/97...
**VT82C598MVP  Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501       Apollo MVP4,Single-Chip 66-100MHz & AGP       <11/04/98...
**VT82C680     Apollo P6, Pentium-Pro Chip Set               <08/30/96...
**Support chips:
**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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