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**440 series:
***440FX (Natoma)       05/06/96...
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**SL82C550   'Rossini' Pentium          [no datasheet]            c:95
***Notes:
from:
http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html

The Symphony  "Rossini" Chipset  (Symphony Labs:  10AD/4269) (9/13/95)
This is apparently a low-cost alternative to the Triton chipset, as it
operates  with up  to 66  MHz external  clock rates,  up to  two CPUs,
pipelined or non-pipelined, synchronous or [conventional] asynchronous
SRAM cache,  EDO RAM, and  does dual-port busmastering IDE.   It will,
apparently, adjust the voltages to  its various (CPU, PCI, cache, RAM)
buses  to suit  their requirements,  and will  control up  to six  PCI
masters.   It consists  of the  SL82C551 cache/memory  controller, the
SL82C522 data path controller, and the SL82C555 system I/O controller.

***Configurations:...
**
**Support Chips:
**SL82C365    Cache Controller (for 386DX/SX)                     c:91...
**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91...
*TI (Texas Instruments)...
*UMC...
**UM82C206     Integrated Peripheral Controller                    <91
***Info:...
***Versions:...
***Features:
o   Fully compatible with PC/AT architecture
o   Fully compatible with 8237 DMA controller, 8259 Interrupt 
    controller, 8254 Timer/Counter, and 146818 Real Time Clock
o   Provides 7 DMA channels, 13 Interrupt request channels, 2 Timer/
    Counter channels, and a Real Time Clock
o   Built in 74LS612 memory mapper for DMA page address
o   Provides 114 bytes of CMOS RAM memory
o   8 MHz DMA clock with programmable internal divider for 4 MHz 
    operation
o   16M bytes DMA address space
o   Programmable wait states for the DMA cycle
o   Reduced recovery time (120 ns) between I/O operations 



**UM82c45x     Serial/Parallel chips                                 ?...
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