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**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91
***Info:
The HT21  is an  advanced PC/AT compatible,  single-chip 80386SX/80286
design solution.   This highly  integrated single chip  allows simple,
low cost  system design options while featuring  high performance, low
power  consumption,  and minimum  board  space requirements.  Advanced
memory management features  include support for page mode,  2 or 4-way
interleaving in  both pipelined and  non-pipelined modes. The  LIM 4.0
hardware implementation  features dual sets of 32  registers with full
context support for highest performance Optimization of extended local
memory  accesses. An  advanced  EMS hardware  write-protect option  is
provided. The HT21 supports 256K and 1M DRAMs in l by 1, 1 by 4, and 1
by 9 device configurations for up  to 8MB of on-board system memory. A
flexible Shadow  RAM option for  System and Video  BIOS as well  as 8-
16-bit BIOS Options adds to overall design versatility.

A  complete PC/AT  compatible  system with  advanced  features may  be
implemented with minimal external support logic. The HT21 performs all
CPU  and peripheral support  functions in  a single  chip.  Integrated
device  functions include  DMA Controllers,  a Memory  Mapper, Timers,
Counters, Interrupt  Controllers, a Bus Controller  and all supporting
circuitry for PC  core logic requirements. The chip  also contains all
the  necessary  address buffers,  data  transceivers, memory  drivers,
parity  checking   and  supporting  circuitry  for   a  complete  high
performance computer solution. An asynchronous AT Bus clock allows for
a constant 8MHz Bus clock rate for highest bus device compatibility as
defined in  IEEE Spec P996.   In controlled bus applications  the HT21
supports up to a  12 MHz Bus Clock rate. This device  is packaged in a
208-pin Plastic Quad Flat Pack combining several external buffers into
this space saving solution.

***Configurations:...
***Features:...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
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*Symphony...
*TI (Texas Instruments)...
*UMC...
**UM82C480     386/486 PC Chip Set                                 c91
***Info:...
***Configurations:...
***Features:
o   100% IBM PC/AT compatible
o   Supports 80386 CPU running at 25/33/40 MHz
o   Supports 80486 CPU running at 25/33/40/50 MHz in 1x clock
o   Supports Intel 80387 / Weitek 3167 / Weitek 4167 Floating Point 
    Coprocessors
o   Built-in cache controller:
    - Direct-mapped organization with write-back operation
    - 0 wait state for cache hit
    - Flexible cache size: 32/64/128/256/512/1024 KB
    - Hidden DRAM refresh to boost system performance
    - built-in registers to support three independent non-cacheable 
      regions
    - Support cache line fill as well as 80486 burst mode
    - Support Automatic Memory Size Detection
o   Sophisticated DRAM controller:
    - Supports Fast/Standard page mode
    - Supports 4 banks CPU speed DRAM with memory size up to 64MB
    - Supports mixable 256Kx9, 1Mx9, 4Mx9 DRAM modules
    - Programmable DRAM wait states
    - Supports 256KB or 384KB (A to F segments of first 1MB) 
      relocation to the top of DRAM memory
o   Supports sophisticated Shadow RAM for video and system BIOS (C, D,
    E, F segments)
o   Supports first GATE A20 and fasy CPU RESET to optimize OS/2 
    operations
o   Synchronous AT bus clock with programmable clock (divided by 2, 3,
    4, 5, 6)
o   Programmable CPU clock (divided by 1, 2, 3, 4)
o   Support 256KB/512KB/1MB EPROMs with single or double EPROM BIOS 
    configuration

**UM82C493/491 ??????????????? [no datasheet]                        ?...
**UM8498/8496  486 VL Chipset  "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
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