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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
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***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
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**82C802G/GP     System/Power Management Controller (cached)      c:93
***Notes:
Green version of the 82C802.  Supports cached 486 systems running from
20 MHz to  50 MHz. Also supports write-back cache and  VESA LB. PCI is
also supported via the 82C822 bridge chip.

This  is an  amalgamation of  two different  datasheets, the  802G and
802GP. There is very little difference, see the features section.

***Info:...
***Configurations:...
***Features:...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
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**SL82C465    Cache Controller (for 486/386DX/SX)                 c:91
***Info:...
***Versions:...
***Features:
o   Integrated direct mapped cache controller
o   Supports 486/386DX/386SX CPU
o   Supports both 1X and 2X CPU clock
o   Supports 486DX/SX/DX2/SLC up to 50 MHz
o   Supports 386DX/SX/SXLV up to 40 MHz
o   16KB to 4MB cache size
o   Line size from 1 to 4 doublewords
o   VL-Bus Master Device support
o   2-1-1-1 burst mode cache fill
o   Data streaming in external and internal cache
o   SRAM banks interleaving capability
o   Built-in tag comparator
o   Posted write buffer control
o   Cache invalidation support
o   Non-cacheable region support
o   387SX/387/3167/4167 interface
o   Arbitration between reset and HOLD
o   CMOS 100-pin RQFP package

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