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**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
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**82C895 System/Power Management Controller (cached) c:Sep94
***Notes:...
***Info:...
***Configurations:...
***Features:
o Processor interface:
- Intel 80486SX, DX, DX2, SLe, DX4, P24T, P24D
- AMD 486DX, DX2, DXL, DXL2, Plus
- Cyrix DX, DX2, M7
- CPU frequencies supported 20, 25, 33, 40 and 50MHz
o Cache interface:
- Direct Mapped Cache
- Two banks interleaved or single bank non-interleaved
- 64, 128, 256 and 512K cache sizes
- Programmable wait states for L2 cache reads and writes
- 2-1-1-1 read burst and zero wait state write @ 33MHz
- No Valid bit required
- Supports CPUs with L1 write-back support
o DRAM interface:
- Up to 128MB main memory support
- Supports 256KB, 1MB, 4MB, and 16MB single- and double-sided SIMM
modules
- Read page-hit timing of 3-2-2-2 at 33MHz
- Supports hidden, slow and CAS-before-RAS refresh
- Four RAS lines to support four banks of DRAM
- Programmable wait states for DRAM reads and writes
- Enhanced DRAM configuration map
o Power management:
- Support for SMM (System Management Mode) for system power
management implementations
- Programmable power management
- Programmable wake-up events through hardware, software and
external SMI source
- Multiple level GREEN support (NESTED_GREEN)
- STPCLK# protocol support
- One programmable GREEN event timer
o ISA interface:
- 100% IBM PC/AT ISA compatible
- Integrates DMA, timer and interrupt controllers
- Optional PS/2 style IRQ1 and 12 latching
o VESA VL interface:
- Conforms to the VESA v2.0 specification
- Optional support for up to two VL masters
o Miscellaneous features:
- Full support for shadow RAM, write protection, L1/L2
cacheability for video, adapter and system BIOS
- Enhanced arbitration scheme
- Transparent 8042 emulation for fast CPU reset and GATEA20
generation
o Packaging:
- Higher integration
- Reduced TTL count
- Low-power, high-speed 0.8-micron CMOS technology
- 208-pin PQFP (Plastic Quad Flat Pack)
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**950 LPC I/O <07/16/99
***Info:...
***Versions:...
***Features:
o Low Pin Count Interface
- Comply with Intel LPC Interface Specification Rev. 1.0
(Sept. 29, 1997)
- Supports Serial IRQ Protocol
- Supports PCI PME# Interface
o PC98/PC99, ACPI Compliant
- PC98 & PC99 compliant
- Register sets compatible with "Plug and Play ISA Specification
Rev. 1.0a"
- ACPI V. 1.0 compliant
- Supports 9 logical devices
o Enhanced Hardware Monitor
- Built-in 8-bit Analog to Digital Converter
- 3 thermal inputs from remote thermistors or thermal diode or
diode-connected transistor
- 8 voltage monitor inputs (VBAT is measured internally.)
- WatchDog comparison of all monitored values
o Fan Speed Controller
- Provides Fan ON/OFF and PWM control
- 3 programmable Pulse Width Modulation (PWM) Fan control outputs
- Each PWM output supports 128 steps of PWM modes
- Monitors 3 Fan tachometer inputs
o Game Port
- Built-in 558 quad timers and buffer chips
- Supports direct connection of two joysticks
- Game port signals are multiplexed with GPIOs
o Two 16C550 UARTs
- Supports two standard Serial ports
- UART1 is dedicated for Serial port
- UART2 supports either Serial Port or IrDA 1.0/ASKIR
o Consumer Remote Control (TV remote) IR with Power-up Feature
o IEEE 1284 Parallel Port
- Standard mode -- Bi-directional SPP compliant
- Enhanced mode -- EPP V. 1.7 and 1.9 compliant
- High speed mode -- ECP, IEEE 1284 compliant
- Backdrive current reduction
- Printer power-on damage reduction
− Supports POST (Power-On Self Test) Data Port
o Floppy Disk Controller
- Supports two 360K/ 720K/ 1.2M/ 1.44M/ 2.88M floppy
disk drives
- Enhanced digital data separator
- 3-Mode drives supported
- Supports automatic write protection via software
o 48 General Purpose I/O Pins
- Input mode supports switch de-bounce
- SMI is routed through GPIOs
o Flash ROM Interface
- Up to 4M bits flash supported
o Single 24/48 MHz Clock Inputs
o Single +5V Power Supply
o 128-Pin PQFP
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
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*VLSI...
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*Winbond...
*ZyMOS...
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