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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:
The 82498 Cache Controller and multiple 82493 Cache SRAMs combine with
the Pentium processor (735/90,  815/100) and future Pentium Processors
to form a CPU Cache chip set designed for high performance servers and
function-rich  desktops. The high-speed  interconnect between  the CPU
and  cache components has  been optimized  to provide  zero-wait state
operation. This CPU  Cache chip set is fully  compatible with existing
software,  and has new  data integrity  features for  mission critical
applications.

The 82498 Cache Controller implements the MESI write-back protocol for
full multiprocessing support.  Dual ported buffers and registers allow
the 82498  to concurrently  handle CPU bus,  memory bus,  and internal
cache operation for maximum performance.

The 82493 is a customized high-performance SRAM that supports 64-, and
128-bit  wide memory  bus widths,  32-,  and 64-byte  line sizes,  and
optional sectoring. The  data path between the CPU  bus and memory bus
is  separated  by  the  82493,  allowing  the  CPU  bus  to  handshake
synchronously,  asynchronously,  or   with  a  strobed  protocol,  and
allowing concurrent CPU bus and memory bus operations.

***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99
***Info:
The  single  chipset, SiS540,  provides  a  high performance/low  cost
Desktop solution  for the Super Socket  7 series CPUs  based system by
integrating a  high performance North Bridge,  advanced hardware 2D/3D
GUI  engine  and  Super-South  bridge. In  addition,  SiS540  provides
system-on-chip solution  that complies  with Easy PC  Initiative which
supports Instantly Available/OnNow  PC technology, USB, Legacy Removal
and Slotless Design and FlexATX form factor.

By integrating  the Ultra-AGP technology and  advanced 128-bit graphic
display interface, SiS540  delivers high performance and up  to 2 GB/s
memory  bandwidth. Furthermore, SiS540  provides powerful  slice layer
decoding DVD  accelerator to improve the DVD  playback performance. In
addition to providing the  standard interface for CRT monitors, SiS540
also  provides  the Digital  Flat  Panel  Port  (DFP) for  a  standard
interface  between  a  personal  computer  and a  digital  flat  panel
monitor.  To  extend functionality and flexibility,  SiS also provides
the  "Video Bridge"  (SiS301) to  support the  NTSC/PAL  Video Output,
Digital  LCD Monitor  and  Secondary CRT  Monitor,  which reduces  the
external Panel  Link transmitter and TV-Out encoder  for cost effected
solution. SiS540  also adopts  Share System Memory  Architecture which
can flexibly utilize the frame buffer size up to 64MB.

The  "Super-South Bridge"  in  SiS540 integrates  all peripheral  con-
trollers/accelerators/interfaces.   SiS540  provides  a total  commun-
ication   solution  including  10/100Mb   Fast  Ethernet   for  Office
requirement.  SiS540 offers AC’97  compliant interface  that comprises
digital audio engine with 3D-hardware accelerator, on-chip sample rate
converter, and  professional wavetable  along with separate  modem DMA
controller.   SiS540 also provides  interface to  Low Pin  Count (LPC)
operating at 33 MHz clock which is  the same as PCI clock on the host,
and dual USB  host controller with four USB  ports that deliver better
connectivity and 2 x 12Mb bandwidth.

The built-in fast PCI IDE controller supports the ATA PIO/DMA, and the
Ultra DMA33/66 function that supports  the data transfer rate up to 66
MB/s. It provides  a separate data path for two  IDE channels that can
eminently improve the performance under the multi-tasking environment.

***Configurations...
***Features:...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...