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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C496/497     486-VIP 486 Green PC VESA/ISA/PCI Chipset         <95
***Info:...
***Configurations:...
***Features:
o   Host Bus
    - Supports Intel 486, P24D, P24T, DX4, SL
    - Enhanced 486, AMD 486, Enhanced Am486, and Cyrix M7/Cx 5x86
      in 25/33/40/50 Mhz, 5V CPU.
o   VESA Bus Slave
    - Supports VESA Bus Specification Rev. 2.0p with Local Device 
      Target only.
o   PCI Local Bus
    - Supports PCI Bus Specification Rev. 2.0 with up to 4 PCI Masters
    - Implements 3 Level Post Write Buffer for CPU write PCI Target 
      Memory Cycle.
    - Supports Back to Back Single Memory Write to PCI Burst Write.
    - Supports PCI Interrupt Steering with Four PIRQ Inputs.
    - Supports PCI Master Burst Accesses On-Board Memory Up to 64 
      Double Word Long.
    - Supports Concurrency PCI Bus.
    - Snoop  Filter  and  Advanced  Snooping  for  Reducing CPU Snoops 
      During Sequential PCI Master Accesses On-Board Memory Cycles.
    - Supports PCI Bus PCI to PCI Bridge.
o   Supports L1 Cache Write Back CPU (P24T/P24D/M7/Enhanced Am486) 
    systems
o   Supports Cx 5x86 Linear Burst Order Mode.
o   L2 Cache Controller
    - Write-Back or Write-Through Schemes
    - Bank Interleave/Non-Interleave Cache Access
    - Cache Size: 64K/128K/256K/512K/1MB
    - 8 bit or 7 bit Tag (Combined Tag and Dirty SRAM) with  
      Direct-Mapped cache organization.
    - Optional Separate Dirty SRAM.
o   DRAM Controller
    - Supports 8 Banks Non-Interleaved Access for Single and Double 
      Sided SIMMs up to 255 MBytes.
    - Supports DRAM CAS Before RAS Refresh.
    - Supports "Table-Free" DRAM configuration.
    - Programmable driving current for the DRAM signals.
    - Supports Symmetrical and Asymmetrical DRAMs.
    - Supports 256K/512K/1M/2M/4M/8M/16M/32M xN Fast Page Mode and 
      EDO DRAM.
o   Built-In Local Bus IDE Interface
    - Supports Data Conversion for the Double Word Accessing
    - Supports Symmetry Configuration for Channel 1 and Channel  
      0,  PIO  Mode  IDE  Hard Disks.
    - Supports Mode 3 and above Timing.
    - Supports Individual Drive Timing Setting for Optimal Performance
    - Supports Posted Write Buffers and Pre-fetch Buffer.
    - Supports Primary IDE or Secondary IDE Addressing (1Fx/17x)
o   Fast-Slow Link Interface
    - Linkage to ISA Bridge by FS-Link Interface.
    - Fast Access to BIOS, ISA Memory Holes, and Interrupt Acknowledge 
      Cycle by FS-Link.
    - Two Programmable Non-Cacheable Regions 
    - Two Programmable PCI Memory Holes and One Programmable ISA 
      Memory Holes.
o   208-Pin PQFP
o   0.6um Low Power CMOS Technology

**85C501/502/503 Pentium/P54C PCI/ISA Chipset                <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5120           Pentium PCI/ISA Chipset (Mobile)            <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset                <04/02/95...
**5511/5512/5513 Pentium PCI/ISA                             <06/14/95...
**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98
***Info:
The P5  A.G.P./VGA chipset, SiS530/5595, provides  a high performance/
cost index  Desktop/Mobile solution  for the Intel  Pentium P54C/P55C,
AMD K5/K6/K6-II, Cyrix M1/M2 and  other compatible Pentium CPU with 3D
A.G.P. VGA system.

The Host,  PCI, 3D A.G.P.  Video/Graphics & Memory  Controller, SiS530
integrates the  Host- to-PCI bridge,  the PCI interface, the  L2 cache
controller, the  DRAM controller, the high  performance hardware 2D/3D
VGA controller, and the PCI IDE controller.

The   Host  interface   supports   Synchronous/Asynchronous  Host/DRAM
clocking configuration to eminently improve the system performance and
DRAM compatibility issues.

The L2 cache controller can support up to 2 MB P.B. SRAM, and the DRAM
controller  can support  SDRAM  memory  up to  1.5  GBytes with  three
double-sided  SDRAM  DIMMs  configuration.  The cacheable  DRAM  sizes
support up to 256 MBytes.

The built-in fast PCI IDE controller supports the ATA PIO/DMA, and the
Ultra DMA33/66 function  that support the data transfer  rate up to 66
MB/s. It provides the separate data path for two IDE channels that can
eminently improve the performance under the multi-tasking environment.

The A.G.P. internal  interface is supported for integrated  H/W 3D VGA
controller. The  integrated VGA controller  is a high  performance and
targeted at  3D graphics application.  In addition,  the integrated 3D
Video/Graphics controller adopts the  64bits 100MHz host bus interface
high  technology  to  improve  the performance  eminently.   To  cost-
effective the PC system, the  share system memory architecture will be
adopted and  it can flexibly using  the 2MB, 4MB and  8MB frame buffer
size  from programming  the system  BIOS. [something  got  confused in
translation  there  didn't it?]  To  enhance  the system  performance,
SiS530 also supports the local  frame buffer solution and memory sizes
can support up to 8MB with SDRAM and SGRAM.

In addition  to provide  the standard interface  for CRT  monitors, it
also  provides  the Digital  Flat  Panel  Port  (DFP) for  a  standard
interface  between  a  personal  computer  and a  digital  flat  panel
monitor. This  port allows a host  computer to connect  directly to an
external  flat panel  monitor without  the need  for analog-to-digital
conversion  found  in most  flat  panel  monitors  today. As  for  DVD
solution,  the  integrated 3D  VGA  controller  also  support DVD  H/W
accelerator to improve the DVD playback performance.

The SiS5595 PCI  system I/O integrates the PCI-to-ISA  bridge with the
DDMA, PC/PCI DMA  and Serial IRQ capability, the  ACPI/Legacy PMU, the
Data  Acquisition   Interface,  the  Universal   Serial  Bus  host/hub
interface,  and the  ISA  bus  interface which  contains  the ISA  bus
controller, the DMA controllers, the interrupt controllers, the Timers
and  the  Real Time  Clock  (RTC).  It  also integrates  the  Keyboard
Controller and PS/2 mouse interface that can support keyboard power on
function  for users  to power  on system  by entering  the hot  key or
password from  keyboard. The built-in  USB controller, which  is fully
compliant to  OHCI (Open Host Controller Interface),  provides two USB
ports  capable  of  running  full/low  speed USB  devices.   The  Data
Acquisition Interface  offers the ability of  monitoring and reporting
the environmental  condition of  the PC. It  could monitor  5 positive
analog voltage inputs, 2 Fan speed inputs, and one temperature input.

In  addition, SiS5595  also supports  ACPI function  to  meet Advanced
Configuration and Power Interface (ACPI) 1.0 specification for Windows
98 environment,  it can support power-management  timer, Power button,
Real-time  clock alarm  wake up,  more  sleeping state,  ACPI LED  for
sleeping and  working state, LAN wake  up, Modem Ring In  wake up, and
OnNow initiative function.

***Configurations:...
***Features:...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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