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**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94
***Notes:...
***Info:...
***Configurations:...
***Features:...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98
***Info:
The SiS5591/5592  SiS5595 glueless P5  A.G.P. chipset provides  a high
performance/cost index  Desktop/Mobile solution for  the Intel Pentium
P54C/P55C, AMD K5/K6, and Cyrix M1/M2 A.G.P. system.

The SiS5591/SiS5592  A.G.P./PCI controller integrated  the Host-to-PCI
bridge, the L2 cache  controller, the DRAM controller, the Accelerated
Graphics  Port interface,  and the  PCI IDE  controller. The  L2 cache
controller can  support up to 1  M P.B. SRAM, and  the DRAM controller
can  support EDO/FP/SDRAM memory  up to  768 MB  with optional  ECC or
parity check  function. The  A.G.P. 1.0 compliance  interface supports
both  1X, and  2X speed  mode with  sideband address  capability.  The
built-in fast  PCI IDE  controller supports the  ATA PIO/DMA,  and the
Ultra DMA/33 functionality.

SiS5591  and SiS5592  have some  pin-out switching  to  facilitate the
main-board layout.  SiS5591 pin  assignment is based  on the  ATX form
factor,  and  SiS5592  pin  assignment   is  based  on  the  NLX  form
factor. Beside  the pin-out switching, SiS5591 and  SiS5592 is totally
the same on the internal logic circuit.

The SiS5595 PCI  system I/O integrates the PCI-to-ISA  bridge with the
DDMA,  and  Serial  IRQ  capability,  the ACPI/Legacy  PMU,  the  Data
Acquisition  Interface, the Universal  Serial Bus  host/hub interface,
and the ISA  bus interface which contains the  ISA bus controller, the
DMA controllers,  the interrupt controllers,  and the Timers.  It also
integrates the Keyboard controller, and the Real Time Clock (RTC). The
built-in USB controller,  which is fully compliant to  OHCI (Open Host
Controller  Interface),  provides two  USB  ports  capable of  running
full/low speed USB devices.  The Data Acquisition Interface offers the
ability of monitoring and reporting the environmental condition of the
PC. It could  monitor 4 positive analogue voltage  inputs, 2 Fan speed
inputs, and one temperature input.


***Configurations:...
***Features:...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96
***Info:
The SiS5596/5513  with built-in VGA controller is  a two-chip solution
for Pentium PCI/ISA system. A portion  of on board DRAM is shared with
the  built-in  VGA  controller.  In  that  way,  the  system  cost  is
substantially reduced.

The SiS5596/5513 two chips  solution for shared memory architecture is
achieved by  allowing both  GUI / VGA,  and System DRAM  controller to
control system memory. For  the shared memory application, the chipset
always acts  as the  arbiter of memory  bus masters. Whenever  the GUI
wants to  access the memory bus,  it requests the memory  bus from the
chipset first.  The chipset grants the  memory bus to the GUI, only if
the memory bus is not needed by the chipset. The chipset also supports
the two priority  scheme. Other important key features  such as direct
access frame buffer and memory access latency are also supported.

***Configurations:...
***Features:...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
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