[Home] [This version is outdated, a new version is here]
*Title...
*Search:...
*Read Me/FAQ/General Info...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C491/392 486WB PC/AT Chipset <04/21/91
***Info:...
***Configurations:...
***Features:...
**82C493/392 486SXWB <10/21/91...
**82C495SX/392SX LCWB PC/AT chipset [no datasheet] ?...
**82C495SLC DXSLC 386/486 Low Cost Write Back c:92...
**82C495XLC PC/AT Chip Set c:93...
**82c496A/B DXBB PC/AT Chipset <Mar92...
**82C496/7 DXBB PC/AT Chipset (Cached) <01/16/92...
**82C498 DXWB PC/AT chipset [no datasheet] ?...
**82C499 DXSC DX System Controller c:93...
**82C546/547 Python PTM3V c:94...
**82C556/7/8 Viper [no datasheet] ?...
**82C556/7/8N Viper-N Viper Notebook Chipset <05/25/95...
**82C556M/7M/8E Viper-N+ Viper Notebook Chipset c:96...
**82C566/7/8 Viper-Max Chipset Scalable MultiMedia PC Solution ?...
**82C571/572 486/Pentium c:93...
**82C576/7/8 Viper Xpress [no datasheet] ?...
**82C576/8/9 Viper XPress+ [no datasheet, some info] <01/16/97...
**82C596/597 PTMAWB Pentium Adaptive Write-back (Cobra) c:93...
**82C650/1/2 Discovery (Pentium Pro) [no datasheet] ?...
**82C681/2/6/7 386/486WB EISA c:92...
**82C683 386/486AWB EISA [no datasheet] ?...
**82C693/6/7 Pentium uP Write Back Cache EISA c:93...
**82C700 FireStar c:97...
**82C701 FireStar Plus c:97...
**82C750 Vendetta [no datasheet] ?...
**82c801 SCWB2 DX Single Chip Solution c:92...
**82C802 SCWB2 PC/AT Single Chip [no datasheet] ?...
**82C802G/GP System/Power Management Controller (cached) c:93...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**85C471/407 Green PC ISA-VLB 486 Single Chip <94
***Info:
The SiS85C47l, single chip controller supports Intel's 80486DX2/DX/
SX/SL Enhanced, P24D/P24T/P24C CPU, Cyrix's Cx486S2 (M6/M7) CPU and
AMD's Am486DXL/DXLZ CPU.
The Si885C471 is a high performance, 100% PC/AT compatible single chip
controller, designed for cached/non-cached P24D/P24T/P24C, M6/M7 or
486 PC systems. The high integration of the powerful cache controller,
the DRAM controller, the CPU interfaces, the bus controller, the data
buffers and the peripheral controllers provides an easy and economical
solution for compact board manufacturing.
In addition to supporting burst reads for the cache line fills of the
CPU, the SiS85C47l is capable of accepting burst write data of the
CPU's internal cache dirty line(s) during CPU write-back cycles. The
support of the CPU burst write cycle is optional through the control
of the Configuration Registers. The SiS85C471 supports the cache size
up to l MB and the DRAM size up to 128 MB.
The SiS85C471 has a built-in cache controller which supports direct
mapped write-through/write-back cache. The programmable AT-bus clock
supports are compatible with AT-bus timing requirements for different
PC systems.
In addition, the local bus interfaces, the integration of the DMA
Controllers, Interrupt Controllers and Timers/Counters are designed to
be a higher performance, more compact, and more cost-effective product
for a P24D/PZ4T/PZ4C, 486SX/DX/DX2/SL-Enhanced, Am486DXL/DXLZ, or a
Cx48682 (M6/M7) PC/AT system.
The SiS85C47I provides power saving features to allow a system,
through the control of BIOS, to reduce the CPU clock frequency from
50MHz down to 0 MHz(STOP CLOCK) when the system is idle.
To support the SL-Enhanced 486, M6/M7, P24D/P24T/P24C's Am486DXL/DXL2
STPCLK/SMI features, the SiS85C47l also implements the corresponding
logics to support STPCLK /SMI for power saving.
The SiSSSC471 supports the VL-Bus applications including (1) CPU
accesses VL-Bus targets, (2) VL-Bus master mode, and (3) DMA or ISA
master accesses VL-Bus targets.
The SiS85C471 provides flexible ways in configuring the system
depending on whether cache or VESA local bus masters are
supported. The different configurations require different numbers of
external components.
***Configurations:...
***Features:
o Fully IBM PC/AT Compatible. 80486DX2/DX/SX/SL Enhanced, P24D/P24T/
P24C, M6/M7 and Am486DXL/Am486DXL2 Single Chip Controller
o Supports L1 Cache Writeback CPU (P24T/P24D/M6/M7) systems
o Direct Mapped Cache Controller
- Write-Back or Write-Through Schemes
- Bank Interleave or Non-Interleave Cache
- 0/1 Wait State Cache Write Hit
- Flexible Cache Size : 32/64/128/256/512KB or 1MB
- 7 bits or 8 bits TAG addresses
- Flexible 2-1-1-1, 3-1-1-1, 2-2-2-2 and 3-2-2-2 Burst
Read/Write Timing
o Fast Page Burst Mode DRAM Controller
- 4 Banks up to 128MB of DRAMs
- 256K/512K/1M/2M/4M/16MXN DRAM Type
- Programmable DRAM Speed
- Double-sided SIMMs
o Two Programmable Non-Cacheable Regions (64KB-4MB area)
o CAS before RAS Transparent DRAM Refresh
o BIOS/Video ROM Cacheable
o Shadow RAM in Increments of 32KB
- Option to Disable Cache in Shadow RAM Area
o 256K Memory Relocation
o 8042 Emulation of Fast A2OGATE and CPU Reset
o Supports Port 92h
o Hardware/Software De-Turbo Switch
o Supports Two VL-Bus Master
o Supports Flash Memory
o Supports Double/Single frequency input
o CPU Operating frequency 0-100 MHz
o Supports Power Management Mode
- Supports the SMM and the SMI
- CPU Stop Clock Function
- Four Power Saving States
- Long and Short System Timers
- Supports the APM control
- Supports Break Switch control
- Power Saving also on non-SM] CPU
- More System Event Monitoring and the Power Saving Control
o AT Bus State Machine and Controller
o Synchronous/Asynchronous AT Bus Clock
o Programmable AT Bus Speed
- l/2,l/3,1/4,l/5,1/6,1/8,l/10 of Input Clock or 7.159MHz
o Programmable Wait State Generation
- 1 or 2 Wait States for l6-Bit Transfers
- 4 or 5 Wait States for 8-Bit Transfers
o Programmable I/O Recovery Time
o Programmable driving current for the DRAM and the ISA bus signals
o 32-Bit Data Buffer Between CPU and AT System
o Data Conversion and Swapping Logic for 32-/16-/8-Bit Transfers
During CPU and DMA Cycles
o Data Latches for AT Read Cycles
o Parity Generation and Detection Logic
o Port B Register and NMI Logic
o Integrated Peripheral Controllers
- 8259A x2 / 8237x2 / 8254 / 74LS612
o 387/487SX and Weitek 3167/4167 Coprocessors Interface
o 208-Pin PQFP
o 0.8nm Low Power CMOS Technology
**85C496/497 486-VIP 486 Green PC VESA/ISA/PCI Chipset <95...
**85C501/502/503 Pentium/P54C PCI/ISA Chipset <01/09/95...
**5101/5102/5103 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5120 Pentium PCI/ISA Chipset (Mobile) <01/28/97...
**5501/5502/5503 Pentium/P54C PCI/ISA Chipset <04/02/95...
**5511/5512/5513 Pentium PCI/ISA <06/14/95...
**5571 (Trinity) Pentium PCI/ISA Chipset (75MHz) <12/09/96...
**5581/5582 (Jessie) Pentium PCI/ISA Chipset (75MHz) <04/15/97...
**5591/5592/5595 (David) Pentium PCI A.G.P. Chipset <01/09/98...
**5596/5513 (Genesis) Pentium PCI Chipset <03/26/96...
**5597/5598 (Jedi) Pentium PCI/ISA Chipset <04/15/97...
**530/5595 (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540 (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99...
**55x SoC (System-on-chip) <03/14/02...
**
**Support chips:
**85C206 Integrated Peripheral Controller [no datasheet] ?...
**5595 Pentium PCI System I/O <12/24/97...
**950 LPC I/O <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
(c) Copyright mR_Slugs Warehouse - All rights Reserved