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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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*Headland/G2...
**HT44          Secondary Cache                                c:Jun92
***Info:...
***Versions:...
***Features:
General Features
o   Support for 4868X/DX/DX2 CPUs
o   System implementation with Headland’s HTK340 chip set and future 
    486 chip sets
o   16, 20, 25 and 33 MHz CPU speeds

Memory Configurations
o   32KB, 64KB, 128KB, 256KB, 512KB & 1MB cache sizes
o   25ns SRAMs required at 33 MHz
o   Asynchronous and synchronous SRAMs are supported
o   Programmable write-protected and non-cacheable regions are 
    supported through the chip set

Architecture
o   Look-Aside
o   Write through
o   Direct mapped
o   Integrated tag comparator
o   Zero wait state cache hits
o   Simultaneous 486 and secondary cache update on read miss
o   486 line burst cycle support
Package & Die
o   84-pin PLCC
o   LSI Logic’s 0.7 micron HCMOS process

**Other:...
*HMC (Hulon Microelectronics)...
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*OPTi...
**82C895         System/Power Management Controller (cached)   c:Sep94
***Notes:...
***Info:
Overview
The 82C895 provides a highly integrated solution for fully compatible,
high performance  PC/AT platforms.   This chipset will  support 486SX/
DX/DX2/DX4  and P24T microprocessors  in the  most cost  effective and
power  efficient  designs  available  today.  For  power  users,  this
chipset offers optimum performance for systems running up to 50MHz.

Based  fundamentally  on  OPTi's   proven  82C801  and  82C802  design
architectures,  the 82C895 adds  additional memory  configurations and
extensive  power  management  control  for  the  processor  and  other
motherboard components.

The  820895  supports the  latest  write-back  processor designs  from
Intel, AMD, and Cyrix, as well as supporting the AT bus and VESA local
bus  for   compatibility  and   performance.   It  also   includes  an
82C206-compatible  Integrated Peripherals Controller  (IPC). all  in a
single 208-pin PQFP (Plastic Quad Flat Pack) package for low cost.

2.1 Power Management

This block diagram [see  datasheet] exemplifies the flexibility of the
82C895/82C602 GREEN  strategy.  System designs  can easily accommodate
both SLe  and non-SLe  CPUs. If  an Intel non-SLe  CPU is  used, SMI#,
SMIACT#, and  FLUSH# are no  connects.  One design can  easily accomm-
odate both types of processors with minimal changes for upgrades.

***Configurations:...
***Features:...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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