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**82396SX     Smart Cache                                     12/17/90
***Notes:...
***Info:...
***Versions:...
***Features:
o   Optimized Intel386TM SX Microprocessor Companion
o   4 Way SET Associative with Pseudo LRU Algorithm
o   Write Buffer Architecture
o   Integrated 4 Word Write Buffer
o   Integrated Intel387TM SX Math Coprocessor Decode Logic
o   132 Lead PQFP Package
o   Intel486TM SX Microprocessor like Burst
o   Integrated 16 KB Data RAM 
o   16-Byte Line Size
o   Dual Bus Architecture
    - Snooping Maintains Cache Coherency
o   20 MHz Clock
o   Concurrent Line Buffer Cacheing
o   1K of TAG RAM
o   Non-Sectored Architecture

**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?
***Info:...
***Configurations:...
***Features:...
**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92
***Notes:...
***Info:...
***Configurations:...
***Features:
o   Supports 486 SX/DX/DX2 and 487SX 
o   Single chip PC/AT solution: one 208 pin CMOS plastic flat package 
o   1 X and 2X clock source, supporting systems running from 16 
    to 50 MHz 
o   Write back direct mapped, bank interleave cache 
    with size selections: 64, 128, 256, and 512K 
o   Supports 2-1-1-1, 3-1-1-1, 2-2-2-2
,   and 3-2-2-2 cache burst cycles 
o   Programmable cache and DRAM read/write cycles 
o   Built in TAG auto invalidation circuitry 
o   Programmable cache and DRAM read/write cycles 
o   Supports eight banks of 256K, 1 M, and 4M DRAMs for 
    configurations up to 64MB 
o   Supports 3-2-2-2 DRAM burst cycles 
o   Hidden refresh, slow refresh, and CAS before RAS refresh 
    supported 
o   Comprehensive VESA VL and OPTi high performance local bus 
    support 
o   Low power, high speed 0.8u CMOS technology 
o   Integrated peripherals controller 

**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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