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**800 series
***810         (Whitney)       04/26/99...
***810L        (Whitney)       04/26/99...
***810-DC100   (Whitney)       04/26/99...
***810e        (Whitney)       09/27/99...
***810e2       (Whitney)       01/03/01...
***815         (Solano)        06/19/00...
***815e        (Solano-2)      06/19/00...
***815em       (Solano-?)      10/23/00...
***815ep       (Solano-3)      c:Nov'00...
***815p        (Solano-3)      c:Mar'01...
***815g        (Solano-3)      c:Sep'01...
***815eg       (Solano-3)      c:Sep'01...
***820         (Camino)        11/15/99
Chips:
[82820] (MCH) [82801AA] (ICH) [82802] (FWH) [82805AA] (MTH)
CPUs:          Single or Dual P-II/P-III/Celeron
DRAM Types:    SDRAM/Reg SDRAM/RDRAM PC800/Asynch SDRAM*1
Mem Rows:      ?
DRAM Density:  64Mbit 128Mbit 256Mbit
Max Mem:       512MB SDRAM/1GB Reg SDRAM/1GB RDRAM
ECC/Parity:    ECC
AGP speed:     1x 2x 4x
Bus Speed:     100 133
PCI Clock/Bus: 1/3 1/4 PCI 2.2

>*1 RAM operates at 100 MHz regardless of FSB.

***820e        (Camino-2)      06/05/00...
***830M        (Almador)       07/30/01...
***830MP       (Almador)       07/30/01...
***830MG       (Almador)       07/30/01...
***840         (Carmel)        10/25/99...
***845         (Brookdale)     09/10/01...
***845MP       (Brookdale-M)   03/04/02...
***845MZ       (Brookdale-M)   03/04/02...
***845E        (Brookdale-E)   05/20/02...
***845G        (Brookdale-G)   05/20/02...
***845GL       (Brookdale-GL)  05/20/02...
***845GE       (Brookdale-GE)  10/07/02...
***845PE       (Brookdale-PE)  10/07/02...
***845GV       (Brookdale-GV)  10/07/02...
***848P        (Breeds Hill)   c:Aug'03...
***850         (Tehama)        11/20/00...
***850E        (Tehama-E)      05/06/02...
***852GM       (Montara-GM)    01/14/03...
***852GMV      (Montara-GM)    ???...
***852PM       (Montara-GM)    06/11/03...
***852GME      (Montara-GM)    06/11/03...
***854         (?)             04/11/05...
***855GM       (Montara-GM)    03/12/03...
***855GME      (Montara-GM)    03/12/03...
***855PM       (Odem)          03/12/03...
***860         (Colusa)        05/21/01...
***865G        (Springdale)    05/21/03...
***865PE       (Springdale-PE) 05/21/03...
***865P        (Springdale-P)  05/21/03...
***865GV       (Springdale-GV) c:Sep'03...
***875P        (Canterwood)    04/14/03...
*Headland/G2...
**GCK113        80386 AT Compatible Chip Set                   c:oct89
***Info:...
***Configurations:...
***Features:...
**GCK181        Universal PS/2 Chip Set                        c:Mar89...
**HT11          Single 286 AT Chip [no datasheet]               <Aug90...
**HT12/+/A      Single 286 AT Chip with EMS support            c:Aug90...
**HT18          80386SX Single Chip                            c:Sep91...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
**IBM AT: MC146818 Real Time Clock                                 <84
***Info:...
***Versions:...
***Features:
o   Low-Power, High-Speed, High-Density CMOS
o   Internal Time Base and Oscillator
o   Counts Seconds, Minutes, and Hours of the Day
o   Counts Days of the Week, Date, Month, and Year
o   3 V to 6 V Operation
o   Time Base Input Options: 4.194304 MHz, 1.048576 MHz, or 32,768 kHz
o   Time Base Oscillator for Parallel Resonant Crystals
o   40 to 200 uW Typical Operating Power at Low Frequency Time Base
o   4.0 to 20 mW Typical Operating Power at High Frequency Time Base
o   Binary or BCD Representation of Time, Calendar, and Alarm
o   12- or 24-Hour Clock with AM and PM in 12-Hour Mode
o   Daylight Savings Time Option
o   Automatic End of Month Recognition
o   Automatic Leap Year Compensation
o   Microprocessor Bus Compatible [this means absolutely nothing]
o   MOTEL Circuit for Bus Univerality
o   Multiplexed Bus for Pin Efficiency
o   Interfaced with Software as 64 RAM Locations
o   14 Bytes of Clock and Control Registers
o   50 Bytes of General Purpose RAM
o   Status Bit Indicates Data Integrity
o   Bus Compatible Interrupt Signals (IRQ)
o   Three Interrupts are Separately Software Maskable and Testable
      Time-of-Day Alarm, Once-per-Second to Once-per-Day
      Periodic Rates from 30.5 us to 500 ms
      End-of-Clock Update Cycle
o   Programmable Square-Wave Output Signal
o   Clock Output May Be Used as Microprocessor Clock Input
      At Time Base Frequency /1 or /4
o   24-Pin Dual-In-Line Package



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