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**82485       Turbo Cache (and 485Turbocache)                      c90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**GC101/102/103 12/16MHz PC/AT Compatible Chip Set + EMS 4.0   c:Jul89
***Notes:...
***Info:
The GC103 is a companion chip  to the GC101/102 AT chip set. Replacing
the GC102  in its Address Buffer  mode, this chip adds  logic to fully
implement LIM, EMS  4.0.  This device expands the  capabilities of the
GC101/102  chip set.   It adds  support for  up to  8MB of  memory and
Shadow RAM for systems  and video BIOS. The register-intensive design,
combined  with the  use of  system memory,  offers extremely  high EMS
throughput compared with EMS  systems using fewer mapping registers or
expansion  memory. The  GC103 contains  a chip  mapping  register that
allows  EMS  to operate  at  full  system  speed without  adding  wait
states. With 2 sets of  32 EMS registers context switching in hardware
as well as software is supported.

The GC103 provides address buffering  for the expansion bus, local I/O
bus, and the  system board DRAM.  Address ,  DMA, and Refresh controls
are  included  in the  GC103.  The  chip  integrates additional  logic
previously implemented discretely in  the GC101/102 board design. This
device is packaged in a 160 pin quad flatpack.

***Configurations:...
***Features:
o   Hardware implementation of LIM EMS Version 4.0
o   Includes Expanded Memory Manager Software
o   Supports the use of up to 8 MB of on-board system memory
o   Supports Shadow RAM
o   Contains 2 sets of 32 EMS MAP Registers
o   Supports 256K or IM DRAMs
o   Provides Address Buffer functionality
o   Higher Integration; reduces system discrete device count
o   HCMOS Technology

**GCK113        80386 AT Compatible Chip Set                   c:oct89...
**GCK181        Universal PS/2 Chip Set                        c:Mar89...
**HT11          Single 286 AT Chip [no datasheet]               <Aug90...
**HT12/+/A      Single 286 AT Chip with EMS support            c:Aug90...
**HT18          80386SX Single Chip                            c:Sep91...
**HT21          386SX/286 Single Chip (20 MHz)                 c:Aug91...
**HT22          386SX/286 Single Chip (25 MHz)                 c:Sep91...
**HT25          3-volt Core Logic for 386SX                    c:Dec92...
**HT35          Single-Chip Peripheral Controller [partial info]     ?...
**HTK320        386DX Chip Set                                 c:Sep91...
**HTK340        "Shasta" 486 Chip Set                          c:Jun92...
**Support Chips:
**HT44          Secondary Cache                                c:Jun92...
**Other:...
*HMC (Hulon Microelectronics)...
*Logicstar...
**SL9025  Address Controller                                    <oct88
***Info:...
***Versions:...
***Features:...
**SL9090  Universal PC/AT Clock Chip                            <oct88...
**SL9250  Page Mode Memory Controller (16/20MHz 8MB Max)        <oct88...
**SL9350  Page Mode Memory Controller (16/20/25MHz 16MB Max)    <oct88...
**Other:...
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