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**82489DX Advanced Programmable Interrupt Controller 10/12/92
***Notes:...
***Info:...
***Versions:...
***Features:...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:
The Intel 82495XP cache controller and 82490XP cache RAM, when coupled
with a user-implemented memory bus controller, provide a second-level
cache subsystem that eliminates the memory latency and bandwidth
bottleneck for a wide range of multiprocessor systems based on the
i860 XP microprocessor. The CPU interface is optimized to serve the
i860 XP microprocessor with zero wait states at up to 50 MHz. A
secondary cache built from the 82495XP and 82490XP isolates the CPU
from the memory subsystem; the memory can run slower and follow a
different protocol than the i860 XP microprocessor.
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
**HT25 3-volt Core Logic for 386SX c:Dec92
***Info:...
***Configurations:...
***Features:
o 25MHz operation at 2.7V to 3.6V
o Extensive power management features
o SMI support
o Local Bus Interface
o CPU clock control
o 16 general purpose I/O pins
o 2 programmable chip selects
o 44 event activity monitor
o ISA bus refresh control
o Up to 4 banks of 512Kb, 1 Mb and 4Mb DRAM
o Flexible DRAM controller
o Slow and Self refresh DRAM modes
o Page mode DRAM accesses
o DRAM page interleaving
o 4 register EMS
o BIOS shadowing
o Relocation for unused DRAM segments
o PROM Write Enable for FLASH support
o 208 pin PQFP
**HT35 Single-Chip Peripheral Controller [partial info] ?...
**HTK320 386DX Chip Set c:Sep91...
**HTK340 "Shasta" 486 Chip Set c:Jun92...
**Support Chips:
**HT44 Secondary Cache c:Jun92...
**Other:...
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*OPTi...
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