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**82385SX     32-bit Cache Controller for 80386SX             01/25/89
***Notes:...
***Info:...
***Versions:...
***Features:
o   Improves 386 SX System Performance
    - Reduces Average CPU Wait States to Nearly Zero
    - Zero Wait State Read Hit
    - Zero Wait State Posted Memory Writes
    - Allows Other Masters to Access the System Bus More Readily
o   Hit Rates up to 99%
o   Optimized as 386 SX Companion
    - Simple 386 SX Interface
    - Part of Intel386-Based Compute Engine Including 387 SX Math 
      Coprocessor and 82370 Integrated System Peripheral
    - 16 MHz and 20 MHz Operation
o   Software Transparent
o   Synchronous Dual Bus Architecture
    - Bus Watching Maintains Cache Coherency
o   Maps Full 386 SX Address Space 
o   Flexible Cache Mapping Policies
    - Direct Mapped or 2-Way Set Associative Cache Organization
    - Supports Non-Cacheable Memory Space
    - Unified Cache for Code and Data
o   Integrates Cache Directory and Cache Management Logic
o   High Speed CHMOS Technology
    - 132-Pin PGA Package

**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:
The Intel 82495XP cache controller and 82490XP cache RAM, when coupled
with a user-implemented memory  bus controller, provide a second-level
cache  subsystem  that eliminates  the  memory  latency and  bandwidth
bottleneck for  a wide  range of multiprocessor  systems based  on the
i860 XP  microprocessor. The CPU  interface is optimized to  serve the
i860  XP microprocessor  with zero  wait  states at  up to  50 MHz.  A
secondary cache  built from the  82495XP and 82490XP isolates  the CPU
from  the memory subsystem;  the memory  can run  slower and  follow a
different protocol than the i860 XP microprocessor.
         
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C802G/GP     System/Power Management Controller (cached)      c:93
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
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