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**82371FB/SB PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95
***Notes:...
***Info:
The 82371FB (PIIX) and 82371SB (PIIXS) PCI ISA IDE Xcelerators are
multi-function PCI devices implementing a PCI-to-ISA bridge function
and an PCI IDE function. In addition, the PIIXS implements a Universal
Serial Bus host/hub function. As a PCI-to-ISA bridge, the PIIX/PIIX3
integrates many common I/O functions found in ISA-based PC systems-a
seven-channel DMA controller, two 82059 interrupt controllers, an 8254
timer/counter, and power management support. In addition to compatible
transfers, each DMA channel supports type F transfers. Chip select
decoding is provided for BIOS, real time clock, and keyboard
controller. Edge/Level interrupts and interrupt steering are supported
for PCI plug and play compatibility. The PIIX/PIIX3 supports two IDE
connectors for up to four IDE devices providing an interface for IDE
hard disks and CD ROMS. The PIIX/PIIX3 provides motherboard plug and
play compatibility. PIIX implements two steerable DMA channels
(including type F transfers) and up to two steerable interrupt
lines. PIIX3 implements one steerable interrupt line. The interrupt
lines can be routed to any of the available ISA interrupts. Both
PIIX/PIIX3 implement a programmable chip select.
PIIXS contains a Universal Serial Bus (USB) Host Controller that is
UHCI compatible. The Host Controller’s root hub has two programmable
USB ports. PIIXS also provides support for an external IOAPIC.
----------------------------------------------------------------------
This document describes the PIIXS Component. Unshaded areas
describe the 82371FB PIIX. Shaded areas, like this one, describe
the PIIXS operations that differ from the 82371FB PIIX.
----------------------------------------------------------------------
***Versions:...
***Features:...
**82371MX Mobile PCI I/O IDE Xcelerator (MPIIX) 11/01/95...
**82371AB PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4) 02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB) c:Mar93...
**82378 System I/O (SIO) (82378IB and 82378ZB) c:Mar93...
**82379AB System I/O-APIC (SIO.A) <Dec94...
**82380 32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384 Clock Generator and Reset Interface c86...
**82385 32-bit Cache Controller for 80386 09/29/87...
**82385SX 32-bit Cache Controller for 80386SX 01/25/89...
**82395DX High Performance Smart Cache 06/18/90...
**82395SX Smart Cache 12/17/90...
**82396SX Smart Cache 12/17/90...
**82485 Turbo Cache (and 485Turbocache) c90...
**82489DX Advanced Programmable Interrupt Controller 10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860) 06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491 Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
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*HMC (Hulon Microelectronics)...
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*OPTi...
**82C802G/GP System/Power Management Controller (cached) c:93
***Notes:...
***Info:
The 82C802G/GP provides a highly integrated solution for fully
compatible, high performance PC/AT platforms. This chipset will
support 486SX/DX/DX2/DX4 and P24T microprocessors in the most cost
effective and power efficient designs available today. For power
users this chipset offers optimum performance for systems running up
to 50MHz.
Based fundamentally on OPTi’s proven 82C801 and 82C802 design
architectures, the 82C802G/GP adds additional memory configurations
and extensive power management control for the processor and other
motherboard components.
The 82C802G/GP supports the latest in write-back processor designs
from Intel, AMD, and Cyrix, as well as supporting the AT bus and VESA
local bus for compatibility and performance. It also includes an
82C206 Integrated Peripherals Controller (IPC), all in a single
208-pin PQFP (Plastic Quad Plat Pack) package for low cost.
Power Management Block
Figure 2-1 [see datasheet] exemplifies the flexibility of the
82C802G/GP/82C602 GREEN strategy. System designs can easily
accommodate both SLe and non-SLe CPUs. If an Intel non-SLe CPU is
used. SMI#, SMIACT#, and FLUSH# are no connects. One design can easily
accommodate both types of processors with minimal changes for
upgrades.
***Configurations:...
***Features:...
**82C895 System/Power Management Controller (cached) c:Sep94...
**82C898 System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2 Buffer Devices <Nov94...
**82C822 PCIB (VLB-to-PCI bridge) c:94...
**Other:...
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