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**82360SL     I/O Subsystem                                   10/05/90
***Notes:...
***Info:
The  82360SL Peripheral  I/O  contains dedicated  logic  to perform  a
number of  CPU, memory, and peripheral support  functions. The 82360SL
device also contains an extensive set of programmable power management
facilities  which  allow  minimized  system  energy  requirements  for
battery-powered portable computers.

The  82360SL includes  a  complete set  of  on-chip peripheral  device
functions  including  two 16450  compatible  serial  ports, one  8-bit
Centronics interface  or bi-directional parallel port,  two 8254 comp-
atible timer counters, two  8259 compatible interrupt controllers, two
8237  compatible  DMA controllers,  one  74LS612  compatible DMA  page
register,  one  146818  compatible  Real-time clock/calendar  with  an
additional  128 bytes  of battery  backed CMOS  RAM and  an integrated
drive electronics (IDE) hard  disk drive interface.  The Intel 82360SL
also contains highly programmable chip selects and complete peripheral
interface  logic  for  direct  keyboard  and  floppy  disk  controller
support. The peripheral registers  and functions behave exactly as the
discrete  components  commonly  found  in industry  standard  personal
computers. The  peripheral logic is  enhanced for static  operation by
supporting write only registers as read/write.

The processor  and memory support  functions contained in  the 82360SL
device eliminate  most of the external random-logic  "glue" that might
otherwise   be  required.   The  82360SL   device   provides  internal
programmable-frequency clock generators for the ISA bus backplane, and
video subsystems. A programmable, low-power DRAM refresh timer is also
provided to  maintain system memory integrity during  the power saving
suspend state.

The  82360SL also  contains a  flexible set  of hardware  functions to
support  the  growing   sophistication  in  power  management  schemes
required by portable systems. Numerous hardware timers, event monitors
and  I/O  interfaces  can  programmable  monitor  and  control  system
activity.  Firmware developed  by  the system  designer allocates  and
directs the hardware to fulfill the unique power management needs of a
given system configuration.

All of the standard  peripheral registers, clock-generation logic, and
power-management  facilities  have been  designed  to ensure  complete
compatibility  with   existing  operating  systems   and  applications
software.
***Versions:...
***Features:...
**82370       Integrated System Peripheral (for 82376)         c:Oct88...
**82371FB/SB  PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX     Mobile PCI I/O IDE Xcelerator (MPIIX)           11/01/95...
**82371AB     PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4)     02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB)   c:Mar93...
**82378       System I/O (SIO) (82378IB and 82378ZB)           c:Mar93...
**82379AB     System I/O-APIC (SIO.A)                           <Dec94...
**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
**82C556M/7M/8E  Viper-N+ Viper Notebook Chipset                  c:96
***Notes:...
***Info:...
***Configurations:...
***Features:
System 
o   100% PC/AT compatible
o   Supports 3.3V Intel Pentium 75/90/100/120 processors at bus 
    frequencies up to 66MHz
o   Supports Cyrix 6x86 processor

DRAM 
o   Full 64-bit FPM/EDO DRAM controller
    - Supports 2-2-2 EDO pipeline at 66MHz bus speed
    - Supports 5V or 3.3V DRAM with-out buffers
    - Supports up to 512MB
    - Controls up to 6 banks
    - Post write buffer
o   Selectable current drive for DRAM bus 

Cache 
o   L1 Cache supports write-through and write-back modes
o   Power managed L2 Cache
    - 64KB-2MB cache
    - Write-back or write-through modes
    - 2-1-1-1 synchronous cache cycles
    - 3-1-1-1 pipelined synchronous cache cycles
    - Combined tag/dirty SRAM option

ISA/VL/PCI Bus 
o   Integrated PCI bus with operation up to 33MHz; supports up to 
    three masters
o   CLKRUN# support for PCI
o   Distributed DMA support (software-based)
o   100% AT-compatible ISA bus; 3.3V or 5V operation, also supports 
    ISA bus masters
o   VL bus support (slave only)
o   Integrated Local Bus IDE supports four drives, which can be bus 
    masters, modes 4 and 5 supported  

Power Management
o   Advanced Power Management Unit
o   Full CPU System Management Mode (SMM) support
o   Full CPU power control through "clock throttling"
o   Full system clock control, even CPU clock can be stopped during 
    APM doze mode
o   Both hardware and software controlled power management
o   Full peripheral power control
o   13 flexible peripheral timers
o   Sixteen power control pins
o   I/O trapping captures address and data
o   Distributed DMA support (software-based)
o   Full peripheral activity tracking
o   Automatic peripheral power-up/power-down features
o   Full suspend current leakage control
o   36 Power Management Interrupt (PMI) sources
o   Eight external power management interrupt sources
o   Supports SMBASE re-programmability that allows the cache to be
    maintained during system management mode, avoiding cache fills 
    after returning from SMM
o   Proprietary automatic internal pull-up/pull-down resistors 
    activated only when needed to reduce power consumption

Thermal Management
o   Advanced Thermal Management Unit
o   Internal mechanism tracks CPU activity and initiates cool down
    mode before CPU temperature reaches a damaging level
o   External sensor option

Packaging
o   82C556M Data Buffer
    - 176 pin TQFP (0.5mm pin spacing)
o   82C557M System Controller
    - 208 pin TQFP (0.5mm pin spacing)
o   82C558E Peripheral Controller
    - 208 pin TQFP (0.5mm pin spacing)

82C602A RTC/Buffer Companion Chip
o   Integrated Real-Time Clock
o   Based on Benchmark Bq3285
o   256 bytes battery-backed memory
o   Integrates multiplexing/demultiplexing logic, latches, and 
    buffers
o   Eliminates most/all TTL in typical synchronous cache system
o   100 pin TQFP package (0.5mm pin spacing)
o   Also available in 100 pin PQFP
     
**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?...
**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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