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**82289       Bus Arbiter for iAPX 286 Processor Family            c83
***Info:...
***Info:
The Intel  M82289 Bus Arbiter is  a 5-volt, 20-pin  HMOS III component
for use in  multiple bus master M80286 systems.  The M82289 provides a
compact solution to system bus arbitration for the M80286 CPU.

The complete IEEE 796 Standard  bus arbitration protocol is supported.
Three modes  of bus release  operation support  a number of  bus usage
models.

FUNCTIONAL DESCRIPTION

The M82289 Bus Arbiter in  conjunction with the M82C288 Bus Controller
and the M82C284 Clock Generator interface the M80286 processor or some
other bus master to a multi-master system bus. The arbiter multiplexes
a processor onto a multi-master  system bus. It avoids contention with
other bus masters.

The M82289 has  two separate state machines  which communicate through
bus request and  release logic. The processor  interface state machine
is synchronous with the local  system clock (CLK) and the multi-master
system bus interface  state machine is synchronous with  the bus clock
(BCLK).

The M82289  performs all signal  ling to request, obtain,  and release
the system bus.  External logic is  used to determine which bus cycles
require  the system  bus  and th  resolve  priorities of  simultaneous
requests for control of the system bus.

***Versions:...
***Features:...
**82258       Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335       High-Integration Interface Device For 386SX      c:Nov88...
**82360SL     I/O Subsystem                                   10/05/90...
**82370       Integrated System Peripheral (for 82376)         c:Oct88...
**82371FB/SB  PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX     Mobile PCI I/O IDE Xcelerator (MPIIX)           11/01/95...
**82371AB     PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4)     02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB)   c:Mar93...
**82378       System I/O (SIO) (82378IB and 82378ZB)           c:Mar93...
**82379AB     System I/O-APIC (SIO.A)                           <Dec94...
**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90...
**82395SX     Smart Cache                                     12/17/90...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93
***Notes:...
***Info:...
***Configurations:
82496 +  8x 82491 (256K)
82496 + 16x 82491 (512K)

Further details on  configurations can be found on  p116 of the second
source.

***Features:...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99
Chips:         
Memory Access Controller (MAC)  
Data Interface Buffer (DIB)
CPUs:          8x P-III Xeon Oct
DRAM Types:    SDRAM PC100 2-way Interleave dual channel
Max Mem:       32GB
ECC/Parity:    ECC
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3 PCI-66/64



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