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**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91
***Notes:...
***Info:...
***Features:...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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*OPTi...
**82C495SLC      DXSLC 386/486 Low Cost Write Back                c:92
***Notes:...
***Info:
The OPTi DXSLC was designed with two major objectives in mind.  First,
support the high volume,  high performance 386/486 VL market.  Second,
be  the   most  cost-efficient  solution,  even,   in  this  extremely
competitive  market. The  DXSLC redefines  chipset solutions  for that
"value" market in a single broad-stroke.

The DXSLC  vehicle provides all the  above values - but  still in, the
OPTi  tradition  of reliability,  compatibility,  support and  service
throughout the design and after sales.

The DXSLC  is designed  to be the  best combination  of cost-effective
packaging and partitioning, while keeping the feature set robust.

The DXSLC  is the "only"  solution if you  want to have  a competitive
solution  in  today's  and  tomorrow's markets.  [vomiting,  too  much
buzzword-laden marketing speech, Zero information]

The  OPTi 495SLC is  a "Super  Low Cost",  two chip  solution offering
optimal performance for low to mid-range 386/486 based AT systems. The
OPTi 495SLC is designed for 386 systems running from 20, 25, 33 and 50
MHz. The  82C495SLC integrates a write-back cache  controller, a local
DRAM controller, the  CPU state machine, the AT  bus state machine and
data  buffers, all  in  a  single 160-pin  PFP.  New on-chip  hardware
provides the hooks for OPTi and VESA local bus device support.
 
***Configurations:...
***Features:
o   One 160-pin CMOS Plastic Flat Package (PFP) plus 82C206 
o   Internal buffers and termination to reduce external parts count 
o   Copy-back Direct-Mapped Cache with size of 64Kb, 128Kb, 256Kb 
    and 512Kb 
o   Up to 10% performance enhancement from write-through cache 
    scheme 
o   Supports 2,1,1,1 or 3,2,2,2 cache cycles 
o   On-chip comparator determines cache hit or miss 
o   Up to 64-MB of local high-speed
,   page-mode
,   DRAM memory space 
o   Burst-line-fill during Cache-Read-Miss 
o   Control of two non-cacheable regions 
o   Shadow RAM support for System BIOS
,   Video Bios and adapter card BIOS 
o   Optional caching of shadowed Video BIOS 
o   Hidden refresh support to enhance system performance 
o   8042 emulation for fast CPU-reset and gateA20 generation 
o   Turbo/slow speed selection 
o   AT-bus clock selectable from ClKI (/6,/5,/4,/3) 
o   CAS before RAS refresh reduces power consumption 
o   Optional 0 or 1 wait state for Cache-Write-Hit 
o   387 Coprocessor support for 386 mode 
o   Internal CD and CA bus pull-up resistors to save components and 
    board real-estate 
o   Comprehensive VESA VL and OPTi High Performance local Bus support 
o   low cost, low power, 1.0u CMOS Technology 

**82C495XLC      PC/AT Chip Set                                   c:93...
**82c496A/B      DXBB PC/AT Chipset                             <Mar92...
**82C496/7       DXBB PC/AT Chipset (Cached)                 <01/16/92...
**82C498         DXWB PC/AT chipset [no datasheet]                   ?...
**82C499         DXSC DX System Controller                        c:93...
**82C546/547     Python PTM3V                                     c:94...
**82C556/7/8     Viper [no datasheet]                                ?...
**82C556/7/8N    Viper-N  Viper Notebook Chipset             <05/25/95...
**82C556M/7M/8E  Viper-N+ Viper Notebook Chipset                  c:96...
**82C566/7/8     Viper-Max Chipset Scalable MultiMedia PC Solution   ?...
**82C571/572     486/Pentium                                      c:93...
**82C576/7/8     Viper Xpress  [no datasheet]                        ?...
**82C576/8/9     Viper XPress+ [no datasheet, some info]     <01/16/97...
**82C596/597     PTMAWB Pentium Adaptive Write-back (Cobra)       c:93...
**82C650/1/2     Discovery (Pentium Pro) [no datasheet]              ?...
**82C681/2/6/7   386/486WB EISA                                   c:92...
**82C683         386/486AWB EISA [no datasheet]                      ?...
**82C693/6/7     Pentium uP Write Back Cache EISA                 c:93...
**82C700         FireStar                                         c:97...
**82C701         FireStar Plus                                    c:97...
**82C750         Vendetta      [no datasheet]                        ?...
**82c801         SCWB2 DX Single Chip Solution                    c:92...
**82C802         SCWB2 PC/AT Single Chip [no datasheet]              ?...
**82C802G/GP     System/Power Management Controller (cached)      c:93...
**82C895         System/Power Management Controller (cached)   c:Sep94...
**82C898         System/Power Management Controller (non-cache)c:Nov94...
**
**Support Chips:
**82C601/2       Buffer Devices                                 <Nov94...
**82C822         PCIB (VLB-to-PCI bridge)                         c:94...
**Other:...
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