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FRX36C200/100         386
FRX36C300/200         386 Write Through
FRX36C300/46C402      386 Write Through
FRX36C311             Single Chip 386SX with Cache
FRX46C411/402         386 Write Through
FRX46C411/412         386 Write Through
FRX46C421A/422        386 Write Back
FRX46C521A            ?
FRX58C613/601A        ?
FRX58C613A/602B/601B  ?

*Intel...
*Headland/G2...
*HMC (Hulon Microelectronics)
**HMC82C206 Integrated Peripherals Controller (10MHz C&T 82c206)     ?...
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*TI (Texas Instruments)
**SN74LS610/2 IBM AT: SN74LS610, SN74LS612 Memory Mappers          <84
***Notes:...
***Info:
Each 'LS610  and 'LS612  memory mapper  integrated circuit  contains a
4-line to  16-line decoder, a  16-word by  12-bit RAM, 16  channels of
2-line to 1-line multiplexers, and  other miscellaneous circuitry on a
monolithic chip. Each  'LS610 also contains 12 latches  with an enable
control.

The memory  mappers are designed  to expand a  microprocessor's memory
addressing capability by  eight bits. Four bits of  the memory address
bus (see  System Block Diagram)[see  datasheet] can be used  to select
one of 16 map registers that contain  12 bits each.  these 12 bits are
presented  to the  system memory  address bus  through the  map output
buffers  along with  the  unused  memory address  bits  from the  CPU.
However, addressable memory space  without reloading the map registers
is the  same as would  be available with  the memory mapper  left out.
The  addressable  memory  space  is  increased  only  by  periodically
reloading the  map registers  from the  data bus.   This configuration
lends itself  to memory utilization  of 16 pages of  2^(n-4) registers
each  without reloading  (n -  number of  address bits  available from
CPU).

These  devices have  four modes  of operation:  read, write,  map, and
pass.  Data may be read from  or loaded into the map register selected
by  the register select  inputs (RS0  thru RS3)  under control  of R/W
whenever chip select (CS) is low. The data I/O takes place on the data
bus DO thru D7. The map  operation will output the contents of the map
register selected by the map address  inputs (MA0 thru MA3) when CS is
high and  MM (map mode control)  is low. The 'LS612  output stages are
transparent in this mode, while  the 'LS610 outputs may be transparent
or latched. When CS and MM are both high (pass mode), the address bits
on MA0 thru MA3 appear at M08-MO11, respectively (assuming appropriate
latch control) with  low levels in the other bit  positions on the map
outputs.
***Versions:...
***Features:...
**TACT82000   3-Chip 286 [no datasheet]                            c89...
**TACT82411   Snake  Single-Chip AT Controller                     c90...
**TACT82S411  Snake+ Single-Chip AT Controller [no datasheet]      c91...
**TACT83000   AT 'Tiger' Chip Set (386)                            c89...
**TACT84500   AT Chip Set (486, EISA) [no datasheet, some info]    c91...
**Other:...
*UMC
**UM82C***     (IBM/INTEL Direct replacement)                      c87
Note:  Dates vary  for when  these  chips were  first available.   Two
databooks have been used one from  '86 the other from '91. Not all the
chips  are  listed  in  the  '86  databook, the  date  of  '87  is  an
assumption.

PC/XT:
IBM:	      UMC:	  Desc:
Intel 8284    UM82C84A    25MHz CMOS Clock Generator and Driver
Intel 8288    UM82C88     Bus Controller
Intel 8259    UM8259A     Programmable Interrupt Controller also UM82C59A-2 (CMOS version)
Intel 8237    UM8237A     3-5MHz Programmable DMA Controller (DMAC)
Intel 8253    UM8253*2    2.6-5MHz Programmable Interval Timer
Intel 8255    UM82C55A*   Programmable Peripheral Interface

Note: *  indicates: possible  compatibility, datasheet does  not state
      explicitly. YMMV.

Note: *2  indicates:   The   UM8253   can   be   replaced   with   the
      UM82C54/-2. The datasheet says it is a superset of the 8253, and
      works up to 10MHz. Also it's compatible with the 8254.  AT: IBM:
      UMC: Desc: Intel 82284  UM82C284* 10-12.5MHz Clock Generator and
      Ready Interface Intel 82288  UM82C288* 10-12.5MHz Bus Controller
      Intel 8254  UM82C54/-2 8-10MHz CMOS Programmable  Interval Timer
      Intel  8259  UM8259A   Programmable  Interrupt  Controller  also
      UM82C59A-2 (CMOS version) Intel 8237 UM8237A 3-5MHz Programmable
      DMA Controller (DMAC) 74LS612 UM74HCT612* Memory Mapper MC146818
      RTC  UM82C6818* Real-Time  Clock (RTC)  Intel 8047  ??  Keyboard
      Controller

Note: *  indicates: possible  compatibility, datasheet does  not state
explicitly. YMMV.

**UM82C088     PC/XT Integration Chip                              <91...
**UM82C230     286AT MORTAR Chip Set                               <91...
**UM82C210     386SX/286 AT Chip Set                               <91...
**UM82C3xx     Twinstar & UM82C336F/N & UM82C39x [no datasheet]      ?...
**UM82C380     386 HEAT PC/AT Chip Set                             <91...
**UM82C480     386/486 PC Chip Set                                 c91
***Info:...
***Configurations:...
***Features:...
**UM82C493/491 ??????????????? [no datasheet]                        ?...
**UM8498/8496  486 VL Chipset  "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91...
**UM82C206     Integrated Peripheral Controller                    <91
***Info:...
***Versions:...
***Features:...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
*Unresearched:...
*VIA
**SL9XXX   FlexSet family General information...
**SL9011   System Controller (80286/80386SX/DX, 16/20/25MHz)    <Jan90...
**SL9020   Data Controller                                      <Jan90...
**SL9025   Address Controller                                   <Jan90...
**SL9030   Integrated Peripheral Controller                     <Jan90...
**SL9090/A Universal PC/AT Clock Chip                           <oct88...
**SL9095   Power  Management Unit                                    ?...
**SL9151   80286 Page Interleave Memory Controller (16-25MHz)        ?...
**SL9250   80386SX Page Mode Memory Controller (16/20MHz 8MB)        ?...
**SL9251   80386SX Page Interleave Memory Controller         <04/13/90...
**SL9252   80386SX System and Memory Controller              <06/12/90...
**SL9350   80386DX Page Mode Memory Controller (16-25MHz 16MB)       ?...
**SL9351   80386DX Page Interleave Memory Controller (33MHz)         ?...
**SL9352   80386DX System and Memory Controller              <06/12/90...
**SLXXXX   Other chips...
**
**VT82C470     "Jupiter", Chip Set (w/o cache) 386 [no datasheet]    ?
**VT82C475     "Jupiter", Chip Set (w/cache) 386   [no datasheet]    ?
**VT82C486/2/3 "GMC chipset"            [no datasheet, some info]    ?...
**VT82C495/480 "Venus" Chip Set                    [no datasheet]    ?
**VT82C495/491 ? EISA Chip Set          [no datasheet, some info]  <93...
**VT82C496G    Pluto, Green PC 80486 PCI/VL/ISA System       <05/30/94...
**VT82C530MV   3.3V Pentium chipset [no datasheet, some info]<05/30/94...
**VT82C570M    Apollo Master, Green Pentium/P54C             <06/22/95...
**VT82C580VP   Apollo VP,  Pentium/M1/K5 PCI/ISA System      <02/15/96...
**VT82C580VPX  Apollo VPX, VPX/97, Pentium with 66/75MHz Bus <01/09/97...
**VT82C590     Apollo VP2, VP2/97, Single-Chip Pentium 66MHz <01/10/97...
**VT82C597/AT  Apollo VP3, Single-Chip for Pentium with AGP  <10/03/97...
**VT82C598MVP  Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501       Apollo MVP4,Single-Chip 66-100MHz & AGP       <11/04/98...
**VT82C680     Apollo P6, Pentium-Pro Chip Set               <08/30/96...
**Support chips:
**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
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