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**440 series:
***440FX (Natoma)       05/06/96...
***440LX (Balboa)       08/27/97...
***440BX (Seattle)      c:Apr'98...
***440DX (?)            c:?...
***440EX (?)            c:Apr'98...
***440GX (Marlinespike) 06/29/98...
***440ZX & 440ZX-66 (?) 01/04/99...
***440ZX-M (?)          05/17/99...
***440MX (Banister)     05/17/99...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
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*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
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*TI (Texas Instruments)...
*UMC...
**UM82C088     PC/XT Integration Chip                              <91
***Info:...
***Configurations:...
***Features:...
**UM82C230     286AT MORTAR Chip Set                               <91...
**UM82C210     386SX/286 AT Chip Set                               <91...
**UM82C3xx     Twinstar & UM82C336F/N & UM82C39x [no datasheet]      ?...
**UM82C380     386 HEAT PC/AT Chip Set                             <91...
**UM82C480     386/486 PC Chip Set                                 c91...
**UM82C493/491 ??????????????? [no datasheet]                        ?...
**UM8498/8496  486 VL Chipset  "Super Energy Star Green"[no dsheet]c94...
**UM8881/8886  HB4 PCI Chipset "Super Energy Star Green"[no dsheet]c94...
**UM8890       Pentium chipset [no datasheet]                        ?...
**
**Support Chips:
**UM82152      Cache Controller (AUStek A38152 clone)              <91...
**UM82C852     Multi I/O For XT                                    <91
***Info:...
***Versions:...
***Features:...
**UM82C206     Integrated Peripheral Controller                    <91...
**UM82c45x     Serial/Parallel chips                                 ?...
**Other chips:...
*Unresearched:...
*VIA...
*VLSI...
**VL82C425         486 Cache controller                              ?
***Info:
The  VL82C425  Cache  Controller   provides  a  low-cost  direct  map,
look-aside write-back  cache option for  use with the  VL82C486 System
Controller. It supports from  64 KB to 1 MB cache  sizes. It can cache
from the first 8 MB to the first 256 MB of on-board DRAM, depending on
the cache  size and  tag option  selected. the cache  line size  is 16
bytes (four double words).

one or two 32-bit wide banks of asynchronous cache SRAM may be used to
hold the  data. Increased  read performance is  obtained by  using two
banks which allow interleaved accesses during burst read cycles.

only one  8-bit or 9-bit (optional)  tag SRAM is required  to hold the
upper memory  address bits and the  dirty bit. The number  of tag SRAM
locations required is  equal to the size of the  data cache (in bytes)
divided by 16.

***Versions:...
***Features:...
**????????         Cheetah 486, PCI [no datasheet]                   ?...
**VL82C3216        Bus Expanding Controller Cache with write buffer  ?...
**VL82C521/522     Lynx/M                                            ?...
**VL82C530         Eagle Ð                                         c95...
**VL82C541/543     Lynx                                            c95...
**VL82C591/593     SuperCore 590                                   c94...
**VL82C594/596/597 Wildcat                                         c95...
**I/O Chips:
**VL82C106 Combination I/O chip                                      ?...
**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
**Video: ...
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**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...