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**M1217/M1209    386SX/SLC Single Chip (40MHz)    [no datasheet]   c91
***Notes:...
**M1219          386DX/486 ISA Cache? Single Chip [no datasheet]     ?
**M1419          386DX/486 ISA Cache  Single Chip [no datasheet]   c91
**Ml429/31/35    486 VLB/PCI/ISA      [no datasheet, some info] cOct93...
**M1439/31/45    486 VLB/PCI/ISA      [no datasheet, some info] <May95...
**M1489/87       FinALi-486 PCI Chipset                         <Feb95...
**M????          Genie, Quad Pentium  [no datasheet, some info]    c95...
**M1451/49       Aladdin    (Pentium) [no datasheet]                 ?...
**M1511/12/13    Aladdin II (Pentium) [no datasheet, some info] >Apr95...
**M1521/23       Aladdin III       50-66MHz                     <Nov96...
**M1531/33/43    Aladdin IV & IV+  50-83.3MHz                <05/28/97...
**M1541/42/33/43 Aladdin V & V+    50-100MHz                         ?...
**M1561/43/35D   Aladdin 7 ArtX    [no datasheet, some info]  11/08/99...
**M6117          386SX Single Chip PC                              <97...
**
**Support Chips:
**M1535/D        South Bridge                                        ?...
**
**May not exist:...
**Later Chipsets:...
**Other:...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
**5571           (Trinity) Pentium PCI/ISA Chipset (75MHz)   <12/09/96
***Info:...
***Configurations:...
***Features:...
**5581/5582      (Jessie)  Pentium PCI/ISA Chipset (75MHz)   <04/15/97...
**5591/5592/5595 (David)   Pentium PCI A.G.P. Chipset        <01/09/98...
**5596/5513      (Genesis) Pentium PCI Chipset               <03/26/96...
**5597/5598      (Jedi)    Pentium PCI/ISA Chipset           <04/15/97...
**530/5595       (Sinbad) Host, PCI, 3D Graphics & Mem. Ctrl.<11/10/98...
**540            (Spartan) Super7 2D/3D Ultra-AGP Single C.S.<11/30/99
***Info:...
***Configurations...
***Features:
o   Supports Intel/AMD/Cyrix/IDT Pentium CPU Host Bus at 66/83/90/
    95/100 MHz with 3.3V Bus Interface
    - Supports the Pipelined Address of Pentium Compatible CPU
    - 100/100, 95/95, 90/90 and 83/83 MHz Synchronous Host/DRAM 
      Clocking Configuration
    - 100/133, 100/66 and 66/100 MHz Asynchronous Host/DRAM Clocking
      Configuration
    - Supports Host Bus Direct Access GUI Engine for Integrated 3D 
      VGA Controller
o   Integrated Level 2 Cache Controller
    - Write Back And Write through Cache Mode
    - Direct Mapped Cache Organization
    - Supports Pipelined Burst SRAM
    - Supports 256K/512K/1M/2M Bytes Cache Sizes
    - Cache Hit Read/Write Cycle of 3-1-1-1
    - Cache Back-To-Back Read Cycle of 3-1-1-1-1-1-1-1
    - Supports Single Read Allocation for L2 Cache
    - Supports Concurrency of CPU to L2 Cache and Integrated A.G.P. 
      VGA Master to DRAM Accesses
o   Integrated DRAM Controller
    - Supports up to 3 Double Sided DIMMs (6 Rows Memory)
    - Supports PC100/PC133 SDRAM Technology
    - Supports NEC Virtual Channel Memory (VC-SDRAM) Technology
    - System Memory Size up to 1.5GB
    - Supports Cacheable DRAM Sizes up to 512 Mbytes
    - Supports 16Mb, 64Mb, 128Mb, 256Mb, 512Mb SDRAM Technology
    - Suspend-To-RAM (STR)
    - Relocatable System Management Memory Region
    - Programmable Buffer Strength for CS#, DQM[7:0], WE#, RAS#, 
      CAS#, CKE, MA[14:0] and MD[63:0]
    - Shadow RAM Size from 640KB to 1MB In 16KB Increments
    - Two Programmable PCI Hole Areas
o   Integrated A.G.P. Compliant Target Host-To-PCI Bridge
    - AGP V2.0 Compliant
    - Supports Graphic Window Size from 4Mbytes To 256Mbytes
    - Supports Pipelined Process in CPU-To-Integrated 3D A.G.P. 
      VGA Access
    - Supports 8 Way, 16 Entries Page Table Cache for GART to Enhance 
      Integrated A.G.P. VGA Controller Read/Write Performance
    - Supports PCI-To-PCI Bridge Function for Memory Write from 33Mhz 
      PCI Bus to Integrated A.G.P. VGA
o   Meets PC99 Requirements
o   PCI 2.2 Specification Compliant
o   High Performance PCI Arbiter
    - Supports up to 4 PCI Masters
    - Rotating Priority Arbitration Scheme
    - Advanced Arbitration Scheme Minimizing Arbitration Overhead
    - Guaranteed Minimum Access Time for CPU And PCI Masters
o   Integrated Host-To-PCI Bridge
    - Zero Wait State Burst Cycles
    - CPU-To-PCI Pipeline Access
    - 256B to 4KB PCI Burst Length for PCI Masters
    - PCI Master Initiated Graphical Texture Write Cycles Re-Mapping
    - Reassembles PCI Burst Data Size into Optimized Block Size
o   Fast PCI IDE Master/Slave Controller
    - Supports PCI Bus Mastering
    - Native Mode and Compatibility Mode
    - PIO Mode 0, 1, 2 , 3, 4
    - Multiword DMA Mode 0, 1, 2
    - Ultra DMA 33/66
    - Two Independent IDE Channels Each with 16 DW FIFO
o   Virtual PCI-To-PCI Bridge
o   Integrated Ultra-AGP VGA for Hardware 2D/3D Video/Graphics 
    Accelerators
    - Supports Tightly Coupled 64 Bits 100Mhz Host Interface to VGA to 
      Speed Up GUI Performance and the Video Playback Frame Rate
    - AGP Rev. 2.0 Compliant
    - Zero-Wait-State 128x4 Post-Write Buffer with Write Combine 
      Capability
    - Zero-Wait-State 128x4 2-Way Read Ahead Cache Capability
    - Re-Locatable Memory-Mapped and I/O Address Decoding
    - Flexible Design Shared Frame Buffer Architecture for Display 
      Memory
    - Shared System Memory Area up to 64MB
    - Built-In 8K Bytes Texture Cache
    - 32-Bit VLIW Floating-Point Primitive Setup Engine
    - Peak Polygon Rate: 4M Polygon/Sec @ 1 Pixel/Polygon with 16bpp, 
      Bilinear Textured, Z Buffered and Alpha Blended
    - Supports Flat and Gouraud Shading
    - Supports High Quality Dithering
    - Supports Z-Test, Stencil Test, Alpha Test and Scissors 
      Clipping Test
    - Supports Z Pre-Test for Reducing Texture Read DRAM Bandwidth
    - Supports 256 Rops
    - Supports Individual Z-Buffer and Render Buffer at the same time
    - Supports 16/24/32 BPP Z Buffer Integer/Floating Formats
    - Supports 16/32 BPP Render Buffer Format
    - Supports 1/2/4/8 Stencil Format
    - Supports Per-Pixel Texture/Fog Perspective Correction
    - Supports MIPMAP with Point-Sampled, Linear, Bi-Linear and 
      Tri-Linear Texture Filtering
    - Supports Single Pass Two MIPMAP Texture, One Texture On Clock
    - Supports up to 2048x2048 Texture Size
    - Supports 2S Power of Width and Height Structure Rectangular 
      Texture
    - Supports 1/2/4/8 BPP Palletize Texture with 32 Bit ARGB Format
    - Supports Palette for High Performance Palette Look Up
    - Supports 1/2/4/8 BPP Luminance Texture
    - Supports 1/2/4/8 BPP Intensity Texture
    - Supports 8/16/24/32 BPP RGB/ARGB Texture Format
    - Supports Video YUV Texture in all Supported Texture Formats
    - Supports MIP-Mapped Texture Transparency, Blending, Wrapping, 
      Mirror and Clamping
    - Supports Fogging and Alpha Blending
    - Supports Vertex Fogging, Linear Fogging Table and Non-Linear 
      Fogging Table
    - Supports Specula Lighting
    - Supports Sort Dependent Edge Anti-Aliasing
    - Supports Full Scene Anti-Aliasing
    - Supports Hardware Back Face Culling
    - Internal Full 32 Bits ARGB Format Ultra Pipelined Architecture 
      for Ultra High Performance and High Rendering Quality
    - 128-Bit 2D Engine with a Full Instruction Set
    - Built-In 64x64x2 Bit-Mapped Hardware Cursor
    - Built-In 32x32x16, 32x32x32 Bit-Mapped Color Hardware Cursor
    - Maximum 64 MB Frame Buffer with Linear Addressing
    - MPEG-2 ISO/IEC 13818-2 MP@ML  and MPEG-1 ISO/IEC 11172-2 
      Standards Compliant
    - Supports Advanced H/W DVD Accelerator
    - Direct DVD to TV Playback
    - Supports Single Frame Buffer Architecture
    - Supports Two Independent Video Windows with Overlay Function 
      and Scaling Factors
    - Supports YUV-To-RGB Color Space Conversion
    - Supports Bi-Linear Video Interpolation with Integer Increments 
      of Pixel Accuracy
    - Supports Graphic and Video Overlay Function
    - Supports VCD/DVD to TV Playback Mode
    - Simultaneous Graphic and TV Video Playback Overlay
    - Supports Current Scan Line Of Refresh Red-Back and Interrupt
    - Supports Tearing Free Double/Triple Buffer Flipping
    - Supports Input Video Vertical Blank or Line Interrupt
    - Supports RGB555, RGB565, YUV422 and YUV420 Video Playback Format
    - [An absurdly long features list, it has transistors too!]
    - Supports Filtered Horizontal up and down Scaling Playback
    - Supports DVD Sub-Picture Playback Overlay
    - Supports DVD Playback Auto-Flipping
    - Built-In Two Video Playback Line Buffers
    - Supports DCI Drivers
    - Supports Direct Draw Drivers
    - [Supports its own drivers, Supports its self, Supports its baby]
    - Built-In Programmable 24-Bit True-Color RAMDAC up to 270 Mhz 
      Pixel Clock RAMDAC Snoop Function
    - Built-In Reference Voltage Generator and Monitor Sense Circuit
    - Supports Down-Loadable RAMDAC for Gamma Correction In High Color 
      and True Color Modes
    - Built-In Dual-Clock Generator
    - Supports Multiple Adapters and Multiple Monitors
    - Built-In PCI Multimedia Interface [We haven't covered this yet?
      marketing has definitely been here]
    - Built-In VESA Plug and Display for Digital TV-Out Encoder, 
      Panellink (TMDS) and LVDS Digital Interface
    - Supports Digital Flat Panel Port for Digital Monitor (LCD Panel)
    - Built-In Secondary CRT Controller for Independent Secondary CRT, 
      LCD or TV Digital Output
    - Supports VESA Standard Super High Resolution Graphic Modes
      640x480         16/256/32K/64K/16M Colors 120 Hz NI
      800x600         16/256/32K/64K/16M Colors 120 Hz NI
      1024x768        256/32K/64K/16M Colors 120 Hz NI
      1280x1024       256/32K/64K/16M Colors 120 Hz NI
      1600x1200       256/32K/64K/16M Colors 100 Hz NI
      1920x1200       256/32K/64K/16M Colors 80 Hz  NI
      Low Resolution Modes
    - Supports Virtual Screen up to 4096x4096
    - Fully DirectX 6.0 Compliant
    - Efficient and Flexible Power Management with ACPI Compliance
    - Supports DDC1, DDC2B and DDC 3.0 Specifications
    - Cooperate with "SiS301 Video Bridge" to Support
          NTSC/PAL Video Output
          Digital LCD Monitor
          Secondary CRT Monitor
o   Low Pin Count Interface
    - Forwards PCI I/O and Memory Cycles into LPC Bus
    - Translates 8-/16-Bit DMA Cycles into PCI Bus Cycles
o   Advanced PCI H/W Audio & S/W Modem
    - Advanced Wavetable Synthesizer
      64-Voices Polyphony Wavetable Synthesizer Supports All 
      Combinations of Stereo/Mono, 8-/16-Bits, and Signed/Unsigned 
      Samples 
      Per Channel Volume and Envelop Control, Pitch Shift, Left/Right 
      Pan, Tremolo, and Vibrato
      Global Effect Process for Reverb, Chorus and Echo
      DirectMusic Support with Unlimited Downloadable Samples in 
      System Memory
      DLS-1-Compatible Downloadable Samples Support
    - DirectSound 3D
      64-Voice DirectSound Channels
      32-Voice DirectSound 3D Accelerator with IID, IAD and Doppler 
      Effects on 3D Positional Audio Buffer
      DirectSound Accelerator for Volume, Pan and Pitch Shift Control 
      on Streaming or Static Buffers
      VirtualHRTF Interactive 3D Positional Audio Accelerator for 
      DirectX 5/6
    - Advanced Streaming Architecture
      Microsoft WDM Streaming Architecture Compliant and Re-Routable 
      Endpoint Support 
      Three Stereo Capture Channels
      AC 97/98 Stereo Recording Channel through AC-Link
    - High Quality Audio and AC97/98 Support
      CD Quality Audio with 90db+ SNR Using External High Quality 
      AC97/98 CODEC
      AC97/98 Support with Full Duplex, Independent Sample Rate 
      Converter for Audio Recording and Playback
      On-Chip Sample Rate Converter Ensures All Internal Operation 
      At 48khz
      High Precision Internal 26-Bit Digital Mixer with 20-Bit 
      Digital Audio Output
    - Full Legacy Compatibility
      SoundBlaster Pro/16
      VirtualFM Enhances Audio Experience through Realtime 
      FM-To-Wavetable Conversion
      MPU-401 Compatible UART for External Or Internal Synthesis
    - Telephony & Modem
      Full Duplex VirtualPhone Speaker Phone With Modem Capable AC97/
      98 HSP V.90 Modem
    - Software Support
      Complete DirectX Driver Suite (DirectSound3D, DirectSound, 
      DirectMusic, DirectInput) for Windows 98/Windows 2000
      Configuration Installation and Diagnostics Under Real Mode DOS, 
      Windows 98 DOS Box 
      Windows 98/ Windows 2000 Configuration, Installation and Mixer 
      Program
    - Extras [oh come on for gods sake when will it end?]
      2-To-6 Speakers Output with Optional VirtaulFX, VirtualAC3
      DirectX Timer for Video/Audio Synchronization 
      I2S and SPDIF Interface
o   Advanced Power Management 
    - Meets ACPI 1.0 Requirements
    - Meets APM 1.2 Requirements
    - ACPI Sleep States Include S1, S2, S3, S4, S5
    - CPU Power States Include C0, C1, C2, C3
    - Power Button with Override [yep folks a power button, wow!]
    - RTC Day-Of-Month, Month-Of-Year Alarm
    - 24-Bit Power Management Timer
    - LED Blinking In S0,S1,S2 and S3 States
    - System Power-Up Events Include: Power Button, Hot-Key, 
      Keyboard Password/ Hot-Key, RTC Alarm, Modem Ring-In, SMBALT#, 
      LAN, PME#, AC 97 Wake-Up and USB Wake-Up [Zzzzzzz....]
    - Software Watchdog Timer
    - PCI Bus Power Management Interface Spec. 1.0
o   Integrated DMA Controller
    - Two 8237A Compatible DMA Controllers 
    - 8/16- Bit DMA Data Transfer
    - Distributed DMA Support
o   [Compatible with motherboards]
o   Integrated Interrupt Controller
    - Two 8259A Compatible Interrupt Controllers
    - Level- Or Edge-Triggered Programmable Serial IRQ
    - Interrupt Sources Re-Routable to Any IRQ Channel
o   Three 8254 Compatible Programmable 16-Bit Counters
    - System Timer Interrupt
    - Generate Refresh Request
    - Speaker Tone Output
o   Integrated Keyboard Controller
    - Hardwired Logic Provides Instant Response [is this a wind up?]
    - Supports PS/2 Mouse Interface
    - Password Security  and Password Power-Up
    - System Sleep and Power-Up By Hot-Key
    - KBC and PS/2 Mouse Can Be Individually Disabled
o   Integrated Real Time Clock (RTC) with 256B CMOS SRAM
    - Supports ACPI Day-Of-Month and Month-Of-Year Alarm 
    - 256 Bytes Of CMOS SRAM
    - Provides RTC H/W Year 2000 Solution
o   Universal Serial Bus Host Controller
    - OpenHCI Host Controller with Root Hub
    - Two USB Host Controllers
    - Four USB Ports
    - Supports Legacy Devices
    - Over Current Detection
o   I2C Bus/SMBUS Series Interface
o   Integrated Fast Ethernet Controller and 10/100 Megabit Per 
    Second (Mbps) Physical Layer Transceivers for the PCI Local Bus
    - Plug and Play Compatible
    - High-Performance 32-Bit PCI Bus Master Architecture with 
      Integrated Direct Memory Access (DMA) Controller for Low CPU 
      and Bus Utilization
    - Supports An Unlimited PCI Burst Length
    - Supports Big Endian and Little Endian Byte Alignments [huh?]
    - Supports PCI Device ID, Vendor ID/Subsystem ID, Subsystem 
      Vendor ID Programming through the EEPROM Interface
    - Implements Optional PCI 3.3V Auxiliary Power Source 3.3Vaux 
      Pin and Optional PCI
    - IEEE 802.3 and 802.3u Standard Compatible
    - IEEE 802.3u Auto Negotiation and Parallel Detection for 
      Automatic Speed Selection
    - Full Duplex and Half Duplex Mode for Both 10 and 100 Mbps.
    - Fully Compliant ANSI X3.263 TP-PMD Physical Sub-Layer Which 
      Includes Adaptive Equalization and Baseline Wander Correction
    - Automatic Jam and IEEE 802.3x Auto-Negotiation for Flow Control
    - Single Access to Complete PHY Register Set
    - Built-In Waveform Shaping Requires No External Filters
    - Single 25Mhz Clock for 10 and 100 Mbps Operation.
    - Power Down Of 10Base-T/100Base-TX Sections When Not In Use <<<
    - Jabber Control and Auto-Polarity Correction for 10Base-T.    ^
    - User Programmable LED Function Mapping                       |
    - Supports Software, Enhanced Software, and Automatic Polling  |
      Schemes to Internal PHY Status Monitor and Interrupt         |
    - Supports 10BASE-T, 100BASE-TX >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>|
    - [Designed by people who like to repeat themselves, a lot]
    - [so they can list more and more features]
o   NAND Tree for Ball Connectivity Testing
o   618-Balls BGA Package
o   1.8V Core with Mixed 3.3V and 5V I/O CMOS Technology

**55x            SoC (System-on-chip)                        <03/14/02...
**
**Support chips:
**85C206     Integrated Peripheral Controller [no datasheet]         ?...
**5595       Pentium PCI System I/O                          <12/24/97...
**950        LPC I/O                                         <07/16/99...
**Other:...
**PII/III/Pro...
**Athlon etc...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
**VT82C597/AT  Apollo VP3, Single-Chip for Pentium with AGP  <10/03/97
***Info:...
***Configurations:...
***Features:...
**VT82C598MVP  Apollo MVP3,Single-Chip 66/75/83/100MHz & AGP <09/22/97...
**VT8501       Apollo MVP4,Single-Chip 66-100MHz & AGP       <11/04/98...
**VT82C680     Apollo P6, Pentium-Pro Chip Set               <08/30/96...
**Support chips:
**VT82C505     Pentium/486 VL to PCI Bridge                  <05/30/94...
**VT82C586/A/B PCI Integrated Peripheral Controller          <10/13/96...
**VT82C596/A   Mobile PCI Integrated Peripheral Controller   <11/05/97...
**VT82C686A/B  PCI Super-I/O Integrated Peripheral Ctrl.     <02/10/98...
**Later P-Pro/II/III/Celeron...
**Later AMD...
**Other...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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