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**82430MX     PCIset (Pentium) MX (Mobile Triton)(82437/438MX)11/01/95
***Notes:...
***Info:
The  Intel 430MX  PCIset  consists of  the  82437MX System  Controller
(MTSC). two  82438MX Data  Paths (MTDP), and  the 82371MX PCI  I/O IDE
Xcelerator (MPIIX). The PCIset forms a Host-to-PCI bridge and provides
the second level cache control and a full function 64-bit data path to
main  memory. The  MTSC  integrates  the cache  and  main memory  DRAM
control functions  and provides bus control for  transfers between the
CPU, cache, main memory, and the  PCI Bus. The second level (L2) cache
controller supports a  write-back cache policy for cache  sizes of 256
Kbytes and 512 Kbytes. Cacheless designs are also supported. The cache
memory can  be implemented with  either standard, burst,  or pipelined
burst SRAMs.  An external Tag RAM is  used for the address  tag and an
internal Tag  RAM for the  cache line status  bits. For the  MTSC DRAM
controller,  four rows  are supported  for up  to 128  Mbytes  of main
memory. The MTSC optimized PCI interface allows the CPU to sustain the
highest  possible  bandwidth  to  the  graphics frame  buffer  at  all
frequencies.  Using  the snoop  ahead  feature,  the  MTSC allows  PCI
masters to  achieve full  PCI bandwidth.  The  MTDPs provide  the data
paths  between the  CPU/cache,  main memory,  and  PCI. For  increased
system performance.  the MTDPs contain read prefetch  and posted write
buffers.

***Configurations:...
***Features:...
**82430HX     PCIset (Pentium) HX (Triton II) (82439HX)       02/12/96...
**82430VX     PCIset (Pentium) VX (Triton II) (82437VX/82438) 02/12/96...
**82430TX     PCIset (Pentium) TX (Triton II) (82439TX)       02/17/97...
**82450KX/GX  PCIset (Pentium Pro) KX/GX (Mars/Orion)         11/01/95...
**
**Support Chips:
**82091AA     Advanced Interface Peripheral (AIP)                  c93...
**8289        Bus Arbiter (808x)                                   c79...
**82289       Bus Arbiter for iAPX 286 Processor Family            c83...
**82258       Advanced Direct Memory Access Coprocessor(ADMA) 01/01/84...
**82335       High-Integration Interface Device For 386SX      c:Nov88...
**82360SL     I/O Subsystem                                   10/05/90...
**82370       Integrated System Peripheral (for 82376)         c:Oct88...
**82371FB/SB  PCI ISA IDE Xcelerator 82371FB/82371SB (PIIX/3) 01/31/95...
**82371MX     Mobile PCI I/O IDE Xcelerator (MPIIX)           11/01/95...
**82371AB     PCI-TO-ISA / IDE Xcelerator 82371AB (PIIX4)     02/17/97...
**82374/82375 PCI-EISA Bridge (82374EB/82375EB, 374SB/375SB)   c:Mar93...
**82378       System I/O (SIO) (82378IB and 82378ZB)           c:Mar93...
**82379AB     System I/O-APIC (SIO.A)                           <Dec94...
**82380       32-bit DMA Controller w/ Integrated Peripherals 02/01/87...
**82380FB/AB  PCIset: 82380FB Mobile PCI-to-PCI Bridge(MPCI2) 02/17/97...
**82384       Clock Generator and Reset Interface                  c86...
**82385       32-bit Cache Controller for 80386               09/29/87...
**82385SX     32-bit Cache Controller for 80386SX             01/25/89...
**82395DX     High Performance Smart Cache                    06/18/90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82395SX     Smart Cache                                     12/17/90...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:
Chips:
[82454NX] (PXB) [82453NX] (MUX) 
[82452NX] (RCG) [82451NX] (MIOC) 
[82371EB] (PIIX4E),                            
CPUs:          Single/Dual/Quad P-II Xeon/P-III Xeon
DRAM Types:    FPM EDO 2-way Interleave 4-way Interleave
Mem Rows:      8
DRAM Density:  16Mbit 64Mbit
Max Mem:       8GB
ECC/Parity:    Both
AGP speed:     N/A
Bus Speed:     100
PCI Clock/Bus: 1/3


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