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**82396SX     Smart Cache                                     12/17/90
***Notes:...
***Info:...
***Versions:...
***Features:...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
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**?????  (Profusion)    c:99...
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*VLSI...
**VL82C521/522     Lynx/M                                            ?
***Info:
The VL82C520  Lynx/M chipset is  VLSI's system solution  optimized for
the expanding  mobile Pentium  market. Carrying forward  VLSI's mobile
strategy  and leveraging  successful  desktop innovations  to offer  a
complete  solution, Lynx/M  leaps  forward and  integrates the  system
controller into a  single Ball Grid Array (BGA)  package.  Included in
the Lynx/M  solution is a  PCI "Super I/O" controller  that integrates
all  the  standard  mobile  peripherals. The  Lynx/M  offers  a  total
solution  compatible with  the Common  Architecture industry  standard
implementing highly efficient DDMA  (Distributed DMA), Serial IRQ, and
features  for primary  PCI  hot docking  using  a Common  Architecture
compatible PCI to PCI bridge in the docking station.

Lynx/M System Controller; VL82C521
Packaged in a  space-efficient low-profile 352 BGA,  the Lynx/M System
Controller  is  the  heart  of the  solution.   BGA  packaging  allows
integrating functions usually partitioned  into multiple packages. the
integrated functions  include a 66Mhz  CPU interface, 3.3V  mobile PCI
2.1  compliant  bus  controller,  64-bit  SDRAM,  EDO,  and  FPM  DRAM
controller with nine-deep fast access smart write-buffers, on-board L2
256KB  write-back   cache  controller,  and  VLSI's   WATTSmart  power
management control.   The DRAM interface  provides drive for up  to 24
memory   devices   thereby   eliminating   the   need   for   external
drivers. Also, selecting SDRAM provides the opportunity to implement a
high performance system without an L2 cache.

Lynx/M Peripheral Controller; VL82C522
The Lynx/M  chipset also includes a  PCI Super I/O device,  the Lynx/M
Mobile Peripheral  Controller (MPC). This  device, also packaged  in a
low-profile 352 BGA,  integrates a PCI 2.1 compliant  bus interface, a
fully  buffered Bus  Mastering  IDE controller,  an  '077 floppy  disk
controller,  Enhanced Capabilities  Port (ECP),  two 16550  UARTs with
modem  functionality, an  SMB/I2C  bus, an  IrDA  1.1 compatible  Fast
Infrared  communications  port  with ASK  functionality,  a  Real-Time
Clock,  two pulse-width  modulator  outputs (PWM),  and  a 33MHz  8052
microcontroller.   Two on-board  PLLs with  buffering provide  all the
required system  clocks from  only two  crystal inputs,  14.318MHz and
32KHz.

A sub-ISA bus  supporting 8- or 16-bit I/O or  DDMA transfers, and ISA
Bus Mastering supports audio devices. Additionally, eight positive PCI
address decodes provide support to Sub-ISA peripherals.

The 8052 provides the  keyboard controller functionality with built-in
scan for matrix keyboards and  system boot controller functionality to
completely wake  up any part  or all of the  system from any  level of
suspend. The  wake-up event can be  a system event, timer,  or any key
depression on the  keyboard. The MPC also provides up  to 25 GPIO pins
with  expansion capabilities  to  provide flexible  control of  system
components.

Singular  ROM architecture  enabled  by the  integrated 8052  keyboard
controller saves both PCB space and cost by permitting a solitary ROM,
Flash, or  SRAM device to  be used  for keyboard, graphics  and system
BIOS.

WATTSMART Power Management
Incorporated  in  the  Lynx/M  chipset,  the  WATTSmart  is  a  System
Management  Mode-based  power  management system.  WATTSmart  includes
multiple system event monitoring,  a watchdog timer, System Management
Interrupt  (SMI)  generation,  multiple  I/O  traps,  CPU  Stop  Clock
control, and provides three general purpose system Management I/O pins
(SMIOs) for control and monitoring of external devices.

Virtually all activity resources are  available as speed up events and
to generate SMIs. SMIs can be  generated by activity or after a period
of inactivity. An SMI that is generated from activity is generally for
a powered-down device,  and the SMM handler can  restore the device to
normal operation. An SMI from activity  can also be used to resume the
system, start the clocks, etc.

Background
Lynx/M  incorporates  functions  from   previous  desktop  and  mobile
chipsets.  Baselinning from proven core system blocks and modifying to
reflect new market requirements allows VLSI to meet the Time-To-Market
expectations while minimizing risk.

Utilizing high-pin count  BGA packaging allows Lynx/M  to reduce board
space requirements by  greater than 45%.  this allows room  on the PCB
for  additional   functionality  while  reducing  the   complexity  of
multi-layer system boards.

Accessing VLSI's  internal fab technology  allows Lynx/M a path  to an
advanced  0.6um CMOS  process  thereby achieving  a  true 3.3V  system
without performance trade-offs.
 
***Configurations:...
***Features:...
**VL82C530         Eagle Ð                                         c95...
**VL82C541/543     Lynx                                            c95...
**VL82C591/593     SuperCore 590                                   c94...
**VL82C594/596/597 Wildcat                                         c95...
**I/O Chips:
**VL82C106 Combination I/O chip                                      ?...
**VL82C107 SCAMP  Combination I/O chip                               ?...
**VL82C108 TOPCAT Combination I/O chip                               ?...
**VL82C110 Combination I/O chip                                      ?...
**VL82C113 SCAMP  Combination I/O chip                               ?...
**VL82C114 Combination I/O chip                                      ?...
**Video: ...
**Disk:
VL1772-02 5-1/4-inch Floppy Disk Controller/Formatter
VL2793  Single Sided Floppy Disk Formatter/Controller
VL2797  Double Sided Floppy Disk Formatter/Controller
VL53C80 Async SCSI Interface (CMOS) 1.5M bps 
VL6765  Double-Density 4 Floppy Disk Controller.  
VL83C11 SCSI Buffer (CMOS)
VY06612A2 Drive controller

**Modems:...
**Other:...
**Not sure if they actually exist...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...

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