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**A note on VESA support of 486 chipsets.
Many chipsets state  that they support VESA local  bus.  In some cases
these actually  implement VLB somewhat  like PCI, where it  is entirly
decoupled from the CPU bus. Chipsets  that do not state they work with
VLB,  may  be found  on  motherboards  that  contain VLB  slots.   VLB
is  *basically*  The 486  CPU  pinout in  a  slot  form. Unless  these
m/boards contain  some additional  chips, there VLB  implementation is
directly coupled to the CPU.

**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
**ET2000     386/486 WB Chipset                                      ?
***Info:...
***Configurations:...
***Features:...
**ET6000     "Cheetah" 486DX/SX Non-Cache System                <Apr92...
**ET9000     "Jaguar" 486 Write Back Cache AT Single Chip       <Jun92
***Info:...
***Configurations:...
***Features:
o   100% IBM PC/AT Compatible 1-Chip AT Solution
o   1X clock source
o   Designed to work at 16, 20, 25, 33, and 50MHz for 4868X/486DX 
    system
o   Flexible architecture to support 64KB 128KB, 256KB and 512KB 
    Write Back Cache Subsystems
o   Supports 2-1-1-1, 3-1-1-1, 2-2-2-2, and 3-2-2-2 cache Burst 
    move-in cycles
o   Built-in Comparator
o   Support two programmable non-cacheable regions
o   Up to 64MB DRAM memory support with Page Mode
o   Mixing DRAM configurations 256K, 1M and 4M devices
o   Software Programmable DRAM Wait States
o   Shadow RAM option
o   Support 80487SX and Weitek 4167 Coprocessors
o   Option for write protected, cacheable main and video BIOS
o   Fast Reset and Gate A20 to optimize OS/2
o   Asynchronous and Synchronous AT Bus Clock with programmable 
    clock division options:CLK2 divided by 2, 3, 4, 5, 6, 8, 10
o   Concurrent Refresh and slow refresh supported
o   Support 8Kx8 and 8Kx9 Tag RAM
o   Hardware and Software Turbo Clock Switching
o   Support Local Bus
o   1.0 Micron Low Power, High Speed CMOS Technology
o   Less than 12 components plus memory to implement an 486 
    system
o   184 Pin PQFP package

**ET9800/391 "Firefox" 386SX Write Back chipset [no datasheet]       ?...
**82C390SX   "Panda" S.C. 386SX Direct Mapped Cache [no d.sheet]cFeb92...
**66x8       VIA clones [no datasheet]                               ?...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91
***Notes:...
***Info:...
***Configurations:...
***Features:...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...