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**Spelling errors/mistyped words
Yes, I know there are spelling errors, and things are mistyped. It
seems no matter how hard I try my fingers hit 't' twice when typing
'compatible' rendering it 'compattible' numerous, (thousands actually)
times. I don't have the time or the will to check the spelling of
everything. Basic spell checking has been peformed. Please let me know
if there is anything that would lead to incorrect information, or
something is so mangled that it needs revising. But if you can
basically understand what was intended, just cope with it. Just
cope:-)
BTW, "110" port is an "I/O" port that has been OCRed badly, as is an
"1/0" port.
**Info needed on:...
**A note on VESA support of 486 chipsets....
**Datasheets:...
*_IBM...
*ACC Micro...
*ALD...
*ALi...
*AMD . . . . . . . [no datasheets, some info]...
*Chips & Technologies...
*Contaq . . . . . [no datasheets, some info]...
**82C593 3/486 [no datasheet] <May92
Listed in:
ftp://ami.com/archive/Other_Manuals/!index.txt
"
CTQ593_3.ZIP 74690 05-28-92 386 CONTAQ 82c593 CHIPSET
CTQ593_4.ZIP 75792 05-28-92 486 CONTAQ 82c593 CHIPSET
"
Note, the column of dates is the file date.
**82C596/A 3/486 Writeback Cache [no datasheet] <11/11/92...
**?????? 486 EISA chipset [no datasheet] <Feb93...
**82C599 PCI-VLB Bridge [no datasheet, some info] ?
82C599 PCI-VLB Bridge referenced in:
http://web.mit.edu/netbsd/src/sys/dev/pci/pcidevs
from:
https://web.archive.org/web/20050313090427/http://www.os2forum.or.at/english/info/os2hardwareinfo/pci_chips.html
"The Contaq Chipset (Contaq: 1080/4224) (8/27/95)
The Contaq 82C599 is paired with one of their 486VL chipsets (82C596
or 82C597) and bridges directly from the 486 CPU to the PCI bus.
Paraphrased from the Contaq spec.:
The 82C596 system controller provides the CPU interface, VESA bus
interface, ISA bus controller, etc. The 82C599 PCI controller provides
the bridge between PCI master/slave agent and the ISA/VESA standard
expansion bus; it arbitrates all the bus transactions between host
CPU, PCI agent, VESA device, and ISA device.
(Which sounds to me like the PCI bus is attached to the VL bus, rather
than to the CPU, which will cause PCI performance degradation.)"
**82C693 PCI-ISA Bridge [no datasheet] ?...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82497/492 Cache Controller / Cache RAM (for P54 Pentium) <Nov94
***Notes:...
***Info:
The 82497 Cache Controller and multiple 82492 Cache SRAMs combine with
the Pentium processor (735\90, 810\100) to form a CPU Cache chip set
designed for high performance servers and function-rich desktops. The
high-speed interconnect between the CPU and cache components has been
optimized to provide zero-wait state operation. This CPU Cache chip
set is fully compatible with existing software, and has new data
integrity features for mission critical applications.
The 82497 cache controller implements the MESI write-back protocol for
full multiprocessing support. Dual ported buffers and registers allow
the 82497 to concurrently handle CPU bus, memory bus, and internal
cache operation for maximum performance.
The 82492 is a customized high-performance SRAM that supports 32-,
64-, 128-bit wide memory bus widths, 16-, 32-, and 64-byte line sizes,
and optional sectoring. The data path between the CPU bus and memory
bus is separated by the 82492, allowing the CPU bus to handshake
synchronously, asynchronously, or with a strobed protocol, and
allowing concurrent CPU bus and memory bus operations.
***Configurations:...
***Features:...
**82498/493 Cache Controller / Cache RAM (for P54 Pentium) <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX (?) 06/29/98:...
**????? (Profusion) c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
*Logicstar...
*Motorola...
*OPTi...
*PC CHIPS/Amptron/Atrend/ECS/Elpina/etc...
*SIS...
*Symphony...
*TI (Texas Instruments)...
*UMC...
*Unresearched:...
*VIA...
*VLSI...
*Western Digital...
*Winbond...
*ZyMOS...
*General Sources:...
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