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**82C596/A  3/486 Writeback Cache [no datasheet]             <11/11/92
Possibly  two variant,  or one  version with  two names,  one  being a
shorthand:
82C596
82C596A

ftp://ami.com/archive/Other_Manuals/!index.txt
lists the A variant with the date 11/11/92. No date for non-A:
" 
CTQ596.Z06    	88900   12-21-92  3/486 Contaq 596 chipset    06-06 core  
CTQ596A.Z11   	95383   10-07-93  3/486 Contaq 596-A for 11/11/92  
CTQ596_3.Z06   	92195   03-01-93  386   Contaq 596  
CTQ596_3.Z11    98031  	06-21-93  386   Contaq 596
CTQ596_4.Z06    92236  	03-01-93  486   Contaq 596
CTQ596_4.Z11    97602  	06-21-93  486   Contaq 596
CT596A.Z08   	96217   12-09-93  Contaq 596a  
"
Note, the column of dates is the file date.

**??????    486 EISA chipset [no datasheet]                     <Feb93...
**82C599    PCI-VLB Bridge [no datasheet, some info]                 ?...
**82C693    PCI-ISA Bridge [no datasheet]                            ?...
*Efar Microsystems [no datasheets, some info]...
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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
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**UM82C206     Integrated Peripheral Controller                    <91
***Info:
The UM82C206  Integrated Peripheral  controller includes two  8237 DMA
controllers, two  8259 Interrupt controllers, one  8254 Timer/Counter,
one MC146818 compatible  Real Time Clock, an additional  64 bytes CMOS
RAM,  one  74LS612   memory  mapper,  and  some   top  level  decoder/
configuration logic circuits.  It is a single chip  integration of all
main peripheral  parts attached  to the X  bus of  PC/AT architecture.
While  providing  full  compatibility  with  PC/AT  architecture,  the
UM82C206  also  offers  some  enhanced  features  and  improved  speed
performance. These  include an additional  64 bytes of  user definable
CMOS RAM in real time clock  and drastically reduced recovery time for
the 8237, 8259  and 8254.  Programmable wait state  option is provided
for the DME  cycles and CPU I/O cycles accessing  this chip. This chip
also  provides programmable  8  or  4 MHz  DMA  clock selection.   The
UM82C206 is implemented using advanced 1.5u CMOS design technology and
is packaged in an 84-pin PLCC.

***Versions:...
***Features:...
**UM82c45x     Serial/Parallel chips                                 ?...
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