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**82C596/A  3/486 Writeback Cache [no datasheet]             <11/11/92
Possibly  two variant,  or one  version with  two names,  one  being a
shorthand:
82C596
82C596A

ftp://ami.com/archive/Other_Manuals/!index.txt
lists the A variant with the date 11/11/92. No date for non-A:
" 
CTQ596.Z06    	88900   12-21-92  3/486 Contaq 596 chipset    06-06 core  
CTQ596A.Z11   	95383   10-07-93  3/486 Contaq 596-A for 11/11/92  
CTQ596_3.Z06   	92195   03-01-93  386   Contaq 596  
CTQ596_3.Z11    98031  	06-21-93  386   Contaq 596
CTQ596_4.Z06    92236  	03-01-93  486   Contaq 596
CTQ596_4.Z11    97602  	06-21-93  486   Contaq 596
CT596A.Z08   	96217   12-09-93  Contaq 596a  
"
Note, the column of dates is the file date.

**??????    486 EISA chipset [no datasheet]                     <Feb93...
**82C599    PCI-VLB Bridge [no datasheet, some info]                 ?...
**82C693    PCI-ISA Bridge [no datasheet]                            ?...
*Efar Microsystems [no datasheets, some info]...
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*Forex . . . . . . [List only, no datasheets found]...
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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
**Later chipsets (basic spec):
**440 series:...
**450NX  (?)            06/29/98:...
**?????  (Profusion)    c:99...
**800 series...
*Headland/G2...
*HMC (Hulon Microelectronics)...
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**SL9020  Data Controller                                       <oct88
***Info:...
***Versions:...
***Features:
o   Supports 80386, 80386 SX (P9), or 80286-based AT designs.
o   Data In to Data Out time is 15 ns.
o   24 mA output buffers.
o   Includes MD, SD & XD buffers.
o   16 bit data path can be used as Low or High buffer.
o   2 can be used in tandem to provide 32 bit data bus.
o   Low to High byte Transfer.
o   Fast CPU to Memory data path.
o   Advance CMOS Technology.
o   100 pin Flatpack

**SL9025  Address Controller                                    <oct88...
**SL9090  Universal PC/AT Clock Chip                            <oct88...
**SL9250  Page Mode Memory Controller (16/20MHz 8MB Max)        <oct88...
**SL9350  Page Mode Memory Controller (16/20/25MHz 16MB Max)    <oct88...
**Other:...
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