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**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91
***Info:
****General:...
****Wingine/CS4021 Interface:...
****Wingine/CS82310 Interface:
The  CS82310 (also  called the  PEAK/DM chipset)  is another  high end
chipset  that  can  support  Wingine.  To simplify  the  interface  to
PEAK/DM, a companion chip "64201 (Winglue)" has been designed. Winglue
interfaces between PEAK/DM and Wingine.

Figure 3  [see datasheet]  shows the data  bus interface  for PEAK/DM.
The external data buffers are  controlled by Winglue. Wingine uses the
VGA pin to indicate  if it is in VGA or 'Wingine'  mode.  In VGA mode,
the VOE/ pin from Winglue is  high thus tristating the data buffers on
the upper  data bus.   For a  16 bit VGA  interface, the  external PAL
generates MEMCS16/ for the AT bus.  The same signal is used by Winglue
to qualify VMEMR/ and VMEMW/ to Wingine for valid VGA cycles.

In ' Wingine' mode, Winglue pulls  the VOE/ pin low to enable the data
buffers.  The  MDINP pin  from Winglue controls  the direction  of the
data  buffers for  read/write cycles.   Winglue performs  the transfer
cycles  to the  video  RAMs based  on  the XREQ/  input from  Wingine.
Winglue also arbitrates with  the system memory controller for control
of the memory bus during transfer cycles using the HLD/HLDA protocol.

Figure 4 shows the interface  for address and control signals.  During
VGA mode, the VOE/ pin is high to disable the address/control buffers.
In 'Wingine'  mode, VOE/  goes low to  allow the memory  controller to
drive the address and control  lines. Wingine tristates its memory bus
during 'Wingine' mode.

****More:...
***Versions:...
***Features:...
**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
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**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
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