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**64200    (Wingine) High Performance 'Windows Engine'         c:Oct91
***Info:
****General:...
****Wingine/CS4021 Interface:
CS4021 (also called the ISA486 chipset) is CHIPS' next generation high
end  chipset.  This  chipset can  support  both 386  and 486  designs.
Special features are  provided in the ISA486 chipset  for a simple and
elegant interface  to the  Wingine subsystem.  Figure  1 and  Figure 2
show the Wingine/ISA486 interface [see datasheet].

Figure 1 shows the data  path between the ISA486 memory controller and
Wingine memory.  In  VGA mode, Wingine interfaces to  the ISA bus.  In
this mode, display  memory is controlled by Wingine.  The CPU accesses
video memory through Wingine.  In VGA  mode, up to 512 Kbytes of video
memory is supported.   In this mode, the VGA pin  from Wingine is high
to isolate the data bus from  ISA486. As Wingine has 17 address lines,
it is necessary  to qualify memory read and memory  writes with a val-
id  VGA address.   The external  PAL decodes  the upper  address (LA17
-LA23) from the ISA bus for  a valid VGA access (0A0000 - 0BFFFFh) and
qualifies the MEMR/ and MEMW/ signals to Wingine.

When the 64200 is switched to 'Windows Accelerator' (or Wingine) mode,
the ISA486  chipset can access  video memory directly for  much higher
video performance.  In this mode up  to 2 Mbytes of display memory can
be supported.  Figure 1 shows a 1MB implementation.  In 'Wingine' mode
the  full 32  bit memory  bus can  be utilized  for  accessing display
memory.  In this mode, Wingine  tristates its memory bus and pulls the
VGA pin low.  The two data buffers  on the upper 16 bits of the memory
bus  are ena-  bled allowing  the ISA486  memory controller  to access
video  memory  directly.   The   direction  of  the  data  buffers  is
controlled by an external signal  derived from the RAS/, CAS/, and WE/
signals from  ISA486.  For Write  operations, data is driven  onto the
video memory data  lines.  During read cycles, the  buffers are turned
around to drive the data onto the system memory bus.

The XREQ/ signal from Wingine is used to request a transfer cycle from
the  system memory controller.  The memory  controller will  perform a
transfer  cycle to the  video RAMs  when XREQ/  goes active.  Figure 2
shows the interface for address  and control lines.  During VGA modes,
the ISA486 memory controller is  isolated from video memory by pulling
the VGA pin high.  The  addresses and control signals for video memory
are generated by Wingine. In 'Wingine'  mode, the VGA pin goes low and
the  system memory controller  drives the  address and  control lines.
The Wingine memory bus is tristated during this mode.

****Wingine/CS82310 Interface:...
****More:...
***Versions:...
***Features:...
**82C206   Integrated Peripheral Controller                        c86...
**82C601/A Single Chip Peripheral Controller                 <08/30/90...
**82C607   Multifunction Controller                             <Jun88...
**82C710   Universal Peripheral Controller                     c:Aug90...
**82C711   Universal Peripheral Controller II                  c:Jan91...
**82C712   Universal Peripheral Controller II                  c:Jan91...
**82C721   Universal Peripheral Controller III                 c:May93...
**82C735   I/O Peripheral Controller With Printgine            c:Jul93...
**82C835   Single CHIP 386sx AT Cache Controller               c:Apr91...
**F87000   Multi-Mode Peripheral Chip                         11/23/93...
**Other:...
**Disk:...
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*Contaq  . . . . . [no datasheets, some info]...
*Efar Microsystems [no datasheets, some info]...
*ETEQ...
*Faraday...
*Forex . . . . . . [List only, no datasheets found]...
*Intel...
**82395SX     Smart Cache                                     12/17/90
***Notes:...
**82396SX     Smart Cache                                     12/17/90...
**82485       Turbo Cache (and 485Turbocache)                      c90...
**82489DX       Advanced Programmable Interrupt Controller    10/12/92...
**82495DX/490DX DX CPU-Cache Chip Set                           <Sep91...
**82495XP/490XP Cache Controller / Cache RAM (for i860)       06/05/91...
**82496/491     Cache Controller / Cache RAM (for P5 Pentium) 03/22/93...
**82497/492   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**82498/493   Cache Controller / Cache RAM (for P54 Pentium)    <Nov94...
**
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